Datasheet LT6654BX (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 175°C, Wide Supply 2.5V Precision Voltage Reference |
| Pages / Page | 14 / 9 — APPLICATIONS INFORMATION. Long-Term Drift. Figure 11. 175°C LT6654BX-2.5 … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
APPLICATIONS INFORMATION. Long-Term Drift. Figure 11. 175°C LT6654BX-2.5 Sinking 2mA to 3mA. Positive or Negative Operation
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APPLICATIONS INFORMATION Long-Term Drift
–3mA IOUT Long-term drift cannot be extrapolated from accelerated –2mA high temperature testing. This erroneous technique gives drift numbers that are wildly optimistic. The only way long-term drift can be determined is to measure it over VOUT 5mV/DIV/AC the time interval of interest. The LT6654BX drift data 2.5V/DIV TA = 175°C was taken on 40 parts that were soldered into PC boards COUT = 1µF similar to a real world application. The boards were then 100µs/DIV 6654BX F11 placed into a constant temperature oven with TA = 35°C,
Figure 11. 175°C LT6654BX-2.5 Sinking 2mA to 3mA
their outputs scanned regularly and measured with an 8.5 digit DVM. Long-term drift curves are shown in Figure 13.
Positive or Negative Operation
Their drift is much smaller after the first thousand hours. In addition to the series connection, as shown on the front 80 page of this data sheet, the LT6654BX can be operated LT6654BXMS8 as a negative voltage reference. The circuit in Figure 12 40 shows an LT6654BX configured for negative operation. In this configuration, a positive voltage is required at VIN (Pin 8) to bias the LT6654BX internal circuitry. This volt- 0 age must be current limited with R1 to keep the output TAGE CHANGE (PPM) PNP transistor from turning on and driving the grounded –40 output. C1 provides stability during load transients. This OUTPUT VOL connection maintains the same accuracy and temperature coefficient of the positive connected LT6654BX. –80 0 200 400 600 800 1000 TIME (HOURS) 6654BX F13 R1 3k
Figure 13. LT6654BX-2.5 Long Term Drift
3V IN
Power Dissipation
OUT LT6654BX-2.5 0.1µF GND The allowed power dissipation in the LT6654BX is depen- dent on the ambient temperature, V V IN, the load current OUT = –2.5V and the package. The LT6654BX package has a thermal VEE – VOUT C1 R ≤ 0.6mA + I 1µF OUT resistance, or θJA, of 163°C/W. A curve that illustrates V allowed power dissipation versus temperature, for the EE 6654BX F12 8-lead MSOP package, is shown in Figure 14. The typical
Figure 12. Using the LT6654BX-2.5 to Build a –2.5V Reference
power dissipation of the LT6654BX-2.5, as a function of input voltage and output current, is shown in Figure 15. Maximum allowed output regulated sourcing current is shown in Figure 16. It can be seen, for VIN = 36V and Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Typical Application Related Parts
APPLICATIONS INFORMATION Long-Term Drift
–3mA IOUT Long-term drift cannot be extrapolated from accelerated –2mA high temperature testing. This erroneous technique gives drift numbers that are wildly optimistic. The only way long-term drift can be determined is to measure it over VOUT 5mV/DIV/AC the time interval of interest. The LT6654BX drift data 2.5V/DIV TA = 175°C was taken on 40 parts that were soldered into PC boards COUT = 1µF similar to a real world application. The boards were then 100µs/DIV 6654BX F11 placed into a constant temperature oven with TA = 35°C,
Figure 11. 175°C LT6654BX-2.5 Sinking 2mA to 3mA
their outputs scanned regularly and measured with an 8.5 digit DVM. Long-term drift curves are shown in Figure 13.
Positive or Negative Operation
Their drift is much smaller after the first thousand hours. In addition to the series connection, as shown on the front 80 page of this data sheet, the LT6654BX can be operated LT6654BXMS8 as a negative voltage reference. The circuit in Figure 12 40 shows an LT6654BX configured for negative operation. In this configuration, a positive voltage is required at VIN (Pin 8) to bias the LT6654BX internal circuitry. This volt- 0 age must be current limited with R1 to keep the output TAGE CHANGE (PPM) PNP transistor from turning on and driving the grounded –40 output. C1 provides stability during load transients. This OUTPUT VOL connection maintains the same accuracy and temperature coefficient of the positive connected LT6654BX. –80 0 200 400 600 800 1000 TIME (HOURS) 6654BX F13 R1 3k
Figure 13. LT6654BX-2.5 Long Term Drift
3V IN
Power Dissipation
OUT LT6654BX-2.5 0.1µF GND The allowed power dissipation in the LT6654BX is depen- dent on the ambient temperature, V V IN, the load current OUT = –2.5V and the package. The LT6654BX package has a thermal VEE – VOUT C1 R ≤ 0.6mA + I 1µF OUT resistance, or θJA, of 163°C/W. A curve that illustrates V allowed power dissipation versus temperature, for the EE 6654BX F12 8-lead MSOP package, is shown in Figure 14. The typical
Figure 12. Using the LT6654BX-2.5 to Build a –2.5V Reference
power dissipation of the LT6654BX-2.5, as a function of input voltage and output current, is shown in Figure 15. Maximum allowed output regulated sourcing current is shown in Figure 16. It can be seen, for VIN = 36V and Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Typical Application Related Parts
