Datasheet AD603 (Analog Devices) - 20

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AD603 Data Sheet EVALUATION BOARD
The evaluation board of the AD603 enables simple bench-top The output is also ac-coupled and includes a 453 Ω series resistor. experimenting to be performed with easy control of the Set the AD603 gain by connecting a voltage source between the AD603. Built-in flexibility al ows convenient configuration to GNEG and GPOS test loops. The two slide switches SGPOS and accommodate most operating configurations. Figure 50 is a SGNEG provide three connections for GPOS and the GNEG. photograph of the AD603 evaluation board. Either pin can be ground referenced, or biased with a user selected voltage established by R1 and R5 to R7. A signal generator can be connected to the GPOS or GNEG test loops, or the GNEG can be driven to either polarity within the common-mode limits of −1.2 V to +2.0 V; to invert the gain slope, simply reverse the polarity of the voltage source connected to GPOS and GNEG. For bias current measurements, the third switch option disconnects the bias voltage source and permits connection of a microammeter between the GPOS and GNEG pins to ground. The AD603 includes built-in gain resistors selectable at the FDBK pin. The board is shipped with the gain at minimum, with a 0 Ω resistor installed in R3. For maximum gain, simply remove R3. Because of the architecture of the AD603, the 049 bandwidth decreases by 10, but the gain range remains at 40 dB. 00539- Intermediate gain values may be selected by installing a resistor Figure 50. AD603 Evaluation Board between the VOUT and FDBK pins. Any dual-polarity power supply capable of providing 20 mA is Figure 52, Figure 53, and Figure 56 show the component and al that is required, in addition to whatever test equipment the circuit side copper patterns and silkscreen. user wishes to perform the intended tests. Referring to the schematic in Figure 51, the input to the VGA is single-ended, ac-coupled, and terminated in 50 Ω to accommodate most commonly available signal generators.
G1 G2 G3 G4 G5 G6 VPOS GND VNEG C7 C8 10µF 10µF +25V + 25V VPOS VNEG VPOS GPOS VPOS GPOSS C1 R7 SGPOS 0.1µF R1 C2 0.1µF
051
VO VNEG
00539-
VPOS C6 R4 VOUT
Figure 52. Component Side Copper
GNEG AD603 0.1µF 453Ω GNEGS C4 1 8 R6 GPOS VPOS SGNEG 0.1µF W1 2 7 GNEG VOUT C5 R5 R3 0.1µF 3 6 VINP VNEG 0Ω VNEG VNEG 4 5 COMM FDBK C3 0.1µF C9 VIN R2 W2 100Ω VPOS R8 SCOM R9
050
VNEG
00539- Figure 51. Schematic of the AD603 Evaluation Board Rev. K | Page 20 of 24 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Theory of Operation Noise Performance The Gain Control Interface Programming the Fixed-Gain Amplifier Using Pin Strapping Using the AD603 in Cascade Sequential Mode (Optimal SNR) Parallel Mode (Simplest Gain Control Interface) Low Gain Ripple Mode (Minimum Gain Error) Applications Information A Low Noise AGC Amplifier Caution Evaluation Board Outline Dimensions Ordering Guide