Datasheet HT68F001, HT68F0012 (Holtek) - 10

ManufacturerHoltek
DescriptionCost-Effective Flash MCU
Pages / Page56 / 10 — HT68F001/HT68F0012. Cost-Effective Flash MCU. System Start Up Time …
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HT68F001/HT68F0012. Cost-Effective Flash MCU. System Start Up Time Characteristics. Test Conditions. Symbol. Parameter

HT68F001/HT68F0012 Cost-Effective Flash MCU System Start Up Time Characteristics Test Conditions Symbol Parameter

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HT68F001/HT68F0012 HT68F001/HT68F0012 Cost-Effective Flash MCU Cost-Effective Flash MCU System Start Up Time Characteristics
Ta = -40°C ~ �5°C
Test Conditions Symbol Parameter Min. Typ. Max. Unit VDD Conditions
System Sta�t-u� Time Wake-u� f�om condition – HT6�F001 — fSYS = fSUB = fLIRC — 2 — tLIRC tSST System Sta�t-u� Time Wake-u� f�om condition – HT6�F0012 — fSYS = fIRC (5) — 2 — tIRC System Reset De�ay Time Reset sou�ce f�om Powe�-on �eset — RRPOR = 5V/ms 42 4� 54 ms tRSTD System Reset De�ay Time WDTC softwa�e �eset — — System Reset De�ay Time Reset sou�ce f�om WDT overflow — — 14 16 1� ms tSRESET Minimum softwa�e �eset width to �eset — Ta=25°C 45 90 120 μs Note: 1. For the System Start-up time values, whether fSYS is on or off depends upon the mode type and the chosen fSYS system oscillator. Details are provided in the System Operating Modes section. 2. tLIRC = 1/fLIRC 3. If the LIRC is used as the system clock and if it is off when in the SLEEP Mode, then an additional LIRC start up time, tSTART, as provided in the LIRC frequency table, must be added to the tSST time in the table above. 4. The System Speed Switch Time is effectively the time taken for the newly activated oscillator to start up. 5. For the HT68F0012, the system clock is from the IRC oscillator, and the fLIRC is equal to the fIRC divided by 16.
Input/Output Characteristics
Ta = -40°C ~ �5°C
Test Conditions Symbol Parameter Min. Typ. Max. Unit VDD Conditions
5V — 0 — 1.5 V In�ut Low Vo�tage fo� I/O Po�ts o� IL In�ut Pins V ─ — 0 — 0.2VDD 5V — 3.5 — 5 V In�ut High Vo�tage fo� I/O Po�ts o� IH In�ut Pins V — — 0.�VDD — VDD 3V 5 10 — IOL Sink Cu��ent fo� I/O Pins VOL = 0.1VDD m� 5V 10 20 — 3V -1.25 -2.5 — IOH Sou�ce Cu��ent fo� I/O Pins VOH = 0.9VDD m� 5V -2.5 -5 — 3V — 20 60 100 RPH Pu��-high Resistance fo� I/O Po�ts (Note) kΩ 5V — 10 30 50 ILE�K In�ut Leakage Cu��ent 5V VIN = VDD o� VIN = VSS — — ±1 μA tTC TC in�ut �in minimum �u�se width — Ta=25°C 0.03 — — μs Note: The RPH internal pull high resistance value is calculated by connecting to ground and enabled input pin with pull-high resistor and then measuring the input sink current at the specified supply voltage level. Dividing the voltage by this measured current provides the RPH value. Rev. 1.20 10 ���i� 1�� 201� Rev. 1.20 11 ���i� 1�� 201� Document Outline Features CPU Features Peripheral Features General Description Selection Table Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics Low Speed Internal Oscillator Characteristics (LIRC) – HT68F001 Low Speed Internal Oscillator Characteristics (IRC) – HT68F0012 System Start Up Time Characteristics Input/Output Characteristics Power on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0 Memory Pointers – MP0 Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP Status Register – STATUS Oscillators Oscillator Overview System Clock Configurations Internal 32kHz Oscillator – LIRC Internal 512kHz Oscillator – IRC Operating Modes and System Clocks System Clocks System Operation Modes Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers I/O Pin Structures Programming Considerations Timer/Event Counter Timer/Event Counter Registers – TMR, TMRC Timer Mode Event Counter Mode Pulse Width Capture Mode Interrupts Interrupt Registers Interrupt Operation Time Base Interrupt Interrupt Wake-up Function Programming Considerations Application Circuits Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 8-pin SOP (150mil) Outline Dimensions