Datasheet LT3757, LT3757A (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Boost, Flyback, SEPIC and Inverting Controller |
| Pages / Page | 38 / 7 — PIN FUNCTIONS. VC (Pin 1):. GATE (Pin 7):. FBX (Pin 2):. INTVCC (Pin 8):. … |
| Revision | F |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
PIN FUNCTIONS. VC (Pin 1):. GATE (Pin 7):. FBX (Pin 2):. INTVCC (Pin 8):. SS (Pin 3):. SHDN/UVLO (Pin 9):. RT (Pin 4):. SYNC (Pin 5):
Model Line for this Datasheet
- LT3757AEDD#PBF LT3757AEDD#TRPBF LT3757AEMSE#PBF LT3757AEMSE#TRPBF LT3757AEMSE#WPBF LT3757AEMSE#WTRPBF LT3757AHMSE#PBF LT3757AHMSE#TRPBF LT3757AHMSE#WPBF LT3757AHMSE#WTRPBF LT3757AIDD#PBF LT3757AIDD#TRPBF LT3757AIMSE#PBF LT3757AIMSE#TRPBF LT3757AIMSE#WPBF LT3757AIMSE#WTRPBF LT3757AMPMSE#PBF LT3757AMPMSE#TRPBF LT3757EDD#PBF LT3757EDD#TRPBF LT3757EMSE#PBF LT3757EMSE#TRPBF LT3757HMSE#PBF LT3757HMSE#TRPBF LT3757IDD#PBF LT3757IDD#TRPBF LT3757IMSE#PBF LT3757IMSE#TRPBF LT3757MPMSE#PBF LT3757MPMSE#TRPBF
Text Version of Document
LT3757/LT3757A
PIN FUNCTIONS VC (Pin 1):
Error Amplifier Compensation Pin. Used to
GATE (Pin 7):
N-Channel MOSFET Gate Driver Output. stabilize the voltage loop with an external RC network. Switches between INTVCC and GND. Driven to GND when
FBX (Pin 2):
Positive and Negative Feedback Pin. Receives IC is shut down, during thermal lockout or when INTVCC the feedback voltage from the external resistor divider is above or below the OV or UV thresholds, respectively. across the output. Also modulates the frequency during
INTVCC (Pin 8):
Regulated Supply for Internal Loads and start-up and fault conditions when FBX is close to GND. Gate Driver. Supplied from VIN and regulated to 7.2V (typi-
SS (Pin 3):
Soft-Start Pin. This pin modulates compensa- cal). INTVCC must be bypassed with a minimum of 4.7µF tion pin voltage (V capacitor placed close to pin. INTVCC can be connected C) clamp. The soft-start interval is set with an external capacitor. The pin has a 10µA (typical) directly to VIN, if VIN is less than 17.5V. INTVCC can also pull-up current source to an internal 2.5V rail. The soft- be connected to a power supply whose voltage is higher start pin is reset to GND by an undervoltage condition than 7.5V, and lower than VIN, provided that supply does at SHDN/UVLO, an INTV not exceed 17.5V. CC undervoltage or overvoltage condition or an internal thermal lockout.
SHDN/UVLO (Pin 9):
Shutdown and Undervoltage Detect
RT (Pin 4):
Switching Frequency Adjustment Pin. Set the Pin. An accurate 1.22V (nominal) falling threshold with frequency using a resistor to GND. Do not leave this pin externally programmable hysteresis detects when power open. is okay to enable switching. Rising hysteresis is generated by the external resistor divider and an accurate internal
SYNC (Pin 5):
Frequency Synchronization Pin. Used to 2µA pull-down current. An undervoltage condition resets synchronize the switching frequency to an outside clock. sort-start. Tie to 0.4V, or less, to disable the device and If this feature is used, an RT resistor should be chosen reduce VIN quiescent current below 1µA. to program a switching frequency 20% slower than the SYNC pulse frequency. Tie the SYNC pin to GND if this
VIN (Pin 10):
Input Supply Pin. Must be locally bypassed feature is not used. SYNC is ignored when FBX is close with a 0.22µF, or larger, capacitor placed close to the pin. to GND.
Exposed Pad (Pin 11):
Ground. This pin also serves as
SENSE (Pin 6):
The Current Sense Input for the Control the negative terminal of the current sense resistor. The Loop. Kelvin connect this pin to the positive terminal of Exposed Pad must be soldered directly to the local ground the switch current sense resistor in the source of the plane. N-channel MOSFET. The negative terminal of the current sense resistor should be connected to GND plane close to the IC. Rev. F For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS VC (Pin 1):
Error Amplifier Compensation Pin. Used to
GATE (Pin 7):
N-Channel MOSFET Gate Driver Output. stabilize the voltage loop with an external RC network. Switches between INTVCC and GND. Driven to GND when
FBX (Pin 2):
Positive and Negative Feedback Pin. Receives IC is shut down, during thermal lockout or when INTVCC the feedback voltage from the external resistor divider is above or below the OV or UV thresholds, respectively. across the output. Also modulates the frequency during
INTVCC (Pin 8):
Regulated Supply for Internal Loads and start-up and fault conditions when FBX is close to GND. Gate Driver. Supplied from VIN and regulated to 7.2V (typi-
SS (Pin 3):
Soft-Start Pin. This pin modulates compensa- cal). INTVCC must be bypassed with a minimum of 4.7µF tion pin voltage (V capacitor placed close to pin. INTVCC can be connected C) clamp. The soft-start interval is set with an external capacitor. The pin has a 10µA (typical) directly to VIN, if VIN is less than 17.5V. INTVCC can also pull-up current source to an internal 2.5V rail. The soft- be connected to a power supply whose voltage is higher start pin is reset to GND by an undervoltage condition than 7.5V, and lower than VIN, provided that supply does at SHDN/UVLO, an INTV not exceed 17.5V. CC undervoltage or overvoltage condition or an internal thermal lockout.
SHDN/UVLO (Pin 9):
Shutdown and Undervoltage Detect
RT (Pin 4):
Switching Frequency Adjustment Pin. Set the Pin. An accurate 1.22V (nominal) falling threshold with frequency using a resistor to GND. Do not leave this pin externally programmable hysteresis detects when power open. is okay to enable switching. Rising hysteresis is generated by the external resistor divider and an accurate internal
SYNC (Pin 5):
Frequency Synchronization Pin. Used to 2µA pull-down current. An undervoltage condition resets synchronize the switching frequency to an outside clock. sort-start. Tie to 0.4V, or less, to disable the device and If this feature is used, an RT resistor should be chosen reduce VIN quiescent current below 1µA. to program a switching frequency 20% slower than the SYNC pulse frequency. Tie the SYNC pin to GND if this
VIN (Pin 10):
Input Supply Pin. Must be locally bypassed feature is not used. SYNC is ignored when FBX is close with a 0.22µF, or larger, capacitor placed close to the pin. to GND.
Exposed Pad (Pin 11):
Ground. This pin also serves as
SENSE (Pin 6):
The Current Sense Input for the Control the negative terminal of the current sense resistor. The Loop. Kelvin connect this pin to the positive terminal of Exposed Pad must be soldered directly to the local ground the switch current sense resistor in the source of the plane. N-channel MOSFET. The negative terminal of the current sense resistor should be connected to GND plane close to the IC. Rev. F For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
