Datasheet LT3757, LT3757A (Analog Devices) - 9

ManufacturerAnalog Devices
DescriptionBoost, Flyback, SEPIC and Inverting Controller
Pages / Page38 / 9 — APPLICATIONS INFORMATION. Main Control Loop. Programming Turn-On and …
RevisionF
File Format / SizePDF / 1.3 Mb
Document LanguageEnglish

APPLICATIONS INFORMATION. Main Control Loop. Programming Turn-On and Turn-Off Thresholds with. the SHDN/UVLO Pin

APPLICATIONS INFORMATION Main Control Loop Programming Turn-On and Turn-Off Thresholds with the SHDN/UVLO Pin

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link to page 8 link to page 8 link to page 8 LT3757/LT3757A
APPLICATIONS INFORMATION Main Control Loop
The LT3757 has overvoltage protection functions to pro- The LT3757 uses a fixed frequency, current mode con- tect the converter from excessive output voltage over- trol scheme to provide excellent line and load regulation. shoot during start-up or recovery from a short-circuit Operation can be best understood by referring to the condition. An overvoltage comparator A11 (with 20mV Block Diagram in Figure 1. hysteresis) senses when the FBX pin voltage exceeds the positive regulated voltage (1.6V) by 8% and provides a The start of each oscillator cycle sets the SR latch (SR1) reset pulse. Similarly, an overvoltage comparator A12 and turns on the external power MOSFET switch M1 (with 10mV hysteresis) senses when the FBX pin voltage through driver G2. The switch current flows through the exceeds the negative regulated voltage (–0.8V) by 11% external current sensing resistor RSENSE and generates a and provides a reset pulse. Both reset pulses are sent to voltage proportional to the switch current. This current the main RS latch (SR1) through G6 and G5. The power sense voltage VISENSE (amplified by A5) is added to a MOSFET switch M1 is actively held off for the duration of stabilizing slope compensation ramp and the resulting an output overvoltage condition. sum (SLOPE) is fed into the positive terminal of the PWM comparator A7. When SLOPE exceeds the level at the
Programming Turn-On and Turn-Off Thresholds with
negative input of A7 (VC pin), SR1 is reset, turning off the
the SHDN/UVLO Pin
power switch. The level at the negative input of A7 is set The SHDN/UVLO pin controls whether the LT3757 is by the error amplifier A1 (or A2) and is an amplified ver- enabled or is in shutdown state. A micropower 1.22V sion of the difference between the feedback voltage (FBX reference, a comparator A10 and a controllable current pin) and the reference voltage (1.6V or –0.8V, depending source I on the configuration). In this manner, the error ampli- S1 al ow the user to accurately program the supply voltage at which the IC turns on and off. The falling value fier sets the correct peak switch current level to keep the can be accurately set by the resistor dividers R3 and R4. output in regulation. When SHDN/UVLO is above 0.7V, and below the 1.22V The LT3757 has a switch current limit function. The cur- threshold, the small pull-down current source IS1 (typical rent sense voltage is input to the current limit compara- 2µA) is active. tor A6. If the SENSE pin voltage is higher than the sense The purpose of this current is to allow the user to program current limit threshold VSENSE(MAX) (110mV, typical), A6 the rising hysteresis. The Block Diagram of the compara- will reset SR1 and turn off M1 immediately. tor and the external resistors is shown in Figure 1. The The LT3757 is capable of generating either positive or typical falling threshold voltage and rising threshold volt- negative output voltage with a single FBX pin. It can be age can be calculated by the following equations: configured as a boost, flyback or SEPIC converter to gen- erate positive output voltage, or as an inverting converter (R3 V + R4) VIN,FALLING = 1.22 • to generate negative output voltage. When configured as R4 a SEPIC converter, as shown in Figure 1, the FBX pin is VVIN,RISING = 2µA •R3+ VIN,FALLING pulled up to the internal bias voltage of 1.6V by a volt- For applications where the SHDN/UVLO pin is only used age divider (R1 and R2) connected from VOUT to GND. as a logic input, the SHDN/UVLO pin can be connected Comparator A2 becomes inactive and comparator A1 per- directly to the input voltage V forms the inverting amplification from FBX to V IN for always-on operation. C. When the LT3757 is in an inverting configuration, the FBX pin is pulled down to –0.8V by a voltage divider connected from VOUT to GND. Comparator A1 becomes inactive and comparator A2 performs the noninverting amplification from FBX to VC. Rev. F For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts