Datasheet ADL5306 (Analog Devices) - 9

ManufacturerAnalog Devices
Description60 dB-RANGE (100 nA-100 µA) Low-Cost Logarithmic Converter
Pages / Page16 / 9 — THEORY. BIAS. GENERATOR. PHOTODIODE. IREF. VBE1. INPUT. TEMPERATURE. …
File Format / SizePDF / 2.2 Mb
Document LanguageEnglish

THEORY. BIAS. GENERATOR. PHOTODIODE. IREF. VBE1. INPUT. TEMPERATURE. 2.5V. VREF. CURRENT. COMPENSATION. 80k. REF. VBE2. (SUBTRACT AND. 20k

THEORY BIAS GENERATOR PHOTODIODE IREF VBE1 INPUT TEMPERATURE 2.5V VREF CURRENT COMPENSATION 80k REF VBE2 (SUBTRACT AND 20k

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link to page 9 link to page 6 ADL5306 GENERAL STRUCTURE The ADL5306 addresses a wide variety of interfacing conditions
THEORY
to meet the needs of fiber optic supervisory systems, and is The base-emitter voltage of a BJT (bipolar junction transistor) useful in many nonoptical applications. This section explains can be expressed by the following equation, which immediately the structure of this unique style of translinear log amp. The shows its basic logarithmic nature: simplified schematic in Figure 21 shows the key elements. VBE = kT/q ln(IC / IS) (1)
BIAS GENERATOR
where:
PHOTODIODE IREF VBE1
I
INPUT TEMPERATURE 2.5V VREF
C is the collector current
CURRENT COMPENSATION I
I
80k

REF VBE2 (SUBTRACT AND
S is a scaling current, typically only 10–17 A
20k

DIVIDE BY T°K) I
kT/q is the thermal voltage, proportional to absolute
PD 0.5V COMM
temperature (PTAT), and is 25.85 mV at 300 K.
VSUM INPT 44
µ
A/dec 0.5V 14.2k

451
Ω IS is never precisely defined and exhibits an even stronger
2.5V VLOG
temperature dependence, varying by a factor of roughly a
0.5V
billion between –35°C and +85°C. Thus, to make use of the BJT
Q1 V Q2 BE1 VBE2 6.69k
Ω as an accurate logarithmic element, both of these temperature- dependencies must be eliminated.
COMM VNEG (NORMALLY GROUNDED) 03727-0-021
The difference between the base-emitter voltages of a matched Figure 21. Simplified Schematic pair of BJTs, one operating at the photodiode current IPD and The photodiode current I the other operating at a reference current IREF, can be written as PD is received at Pin INPT. The voltage at this node is essentially equal to the voltage on the two VBE1 – VBE2 = kT/q ln(IPD / IS) – kT/q ln(IREF / IS) adjacent guard pins, VSUM and IREF, due to the low offset voltage of the JFET op amp. Transistor Q1 converts IPD to a = ln(10) kT/q log10(IPD / IREF) (2) corresponding logarithmic voltage, as shown in Equation 1. A finite positive value of V = 59.5 mV log10(IPD / IREF) (T = 300 K) SUM is needed to bias the collector of Q1 for the usual case of a single-supply voltage. This is internally The uncertain, temperature-dependent saturation current, IS, set to 0.5 V, one fifth of the 2.5 V reference voltage appearing on that appears in Equation 1 has therefore been eliminated. To Pin VREF. The resistance at the VSUM pin is nominally 16 kΩ; eliminate the temperature variation of kT/q, this difference this voltage is not intended as a general bias source. voltage is processed by what is essentially an analog divider. The ADL5306 also supports the use of an optional negative Effectively, it puts a variable under Equation 2. The output of supply voltage, V this process, which also involves a conversion from voltage N , at Pin VNEG. When VN is –0.5 V or more negative, VSUM may be connected to ground; thus, INPT and mode to current mode, is an intermediate, temperature- IREF assume this potential. This allows operation as a voltage- corrected current: input logarithmic converter by the inclusion of a series resistor ILOG = IY log10(IPD / IREF) (3) at either or both inputs. Note that the resistor setting, IREF, will need to be adjusted to maintain the intercept value. It should where IY is an accurate, temperature-stable scaling current that also be noted that the collector-emitter voltages of Q1 and Q2 determines the slope of the function (change in current per are now the full VN, and effects due to self-heating will cause decade). For the ADL5306, IY is 44 µA, resulting in a errors at large input currents. temperature-independent slope of 44 µA/decade for all values The input-dependent V of IPD and IREF . This current is subsequently converted back to a BE1 of Q1 is compared with the reference V voltage-mode output, VLOG, scaled 200 mV/decade. BE2 of a second transistor, Q2, operating at IREF. This is generated externally to a recommended value of 10 µA. However, other values over a several-decade range can be used with a slight degradation in law conformance (see Figure 8). Rev. 0 | Page 9 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS GENERAL STRUCTURE THEORY MANAGING INTERCEPT AND SLOPE RESPONSE TIME AND NOISE CONSIDERATIONS APPLICATIONS USING A NEGATIVE SUPPLY CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE