Data Brief AP64352 (Diodes) - 2

Request Datasheet AP64352 Pin Descriptions Pin Name Pin Number Function
High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel power MOSFET. A 100nF BST 1 capacitor is recommended from BST to SW to power the high-side driver. Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a VIN 2 3.8V to 40V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise due to the switching of the IC. See
Input Capacitor
section for more details. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator and low to EN 3 turn it off. Connect to VIN or leave floating for automatic startup. The EN has a precision threshold of 1.18V for programing the UVLO. See
Enable
section for more details. Resistor Timing and External Clock. This pin can be used to control the switching frequency by setting the internal oscillator frequency or by synchronizing to an external clock. Connect a resistor from RT/CLK to GND to set the internal oscillator frequency. An external clock can be input directly to the RT/CLK pin and the internal oscillator RT/CLK 4 synchronizes to the external clock frequency using a PLL. If the external clock edges stop, the operating mode automatically returns to resistor frequency programming. See
Programming Switching Frequency
section for more details. Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. FB 5 See
Setting the Output Voltage
section for more details. Soft-start. Place a ceramic capacitor from this pin to ground to program soft-start time. An internal 4μA current SS 6 source pulls the SS pin to VCC. See
Programming Soft-Start Time
section for more details. GND 7 Power Ground. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter SW 8 from SW to the output load. EXPOSED Heat dissipation path of the die. The exposed thermal pad must be electrically connected to GND and must be 9 PAD connected to the ground plane of the PCB for proper operation and optimized thermal performance.
Absolute Maximum Ratings
(Note 4) (At TA = +25°C, unless otherwise specified.)
Symbol Parameter Rating Unit
-0.3 to +42.0 (DC) VIN Supply Pin Voltage V -0.3 to +45.0 (400ms) VBST Bootstrap Pin Voltage VSW - 0.3 to VSW + 6.0 V VEN Enable/UVLO Pin Voltage -0.3 to +42.0 V VRT/CLK RT/CLK Pin Voltage -0.3 to +6.0 V VFB Feedback Pin Voltage -0.3 to +6.0 V VSS Soft-Start Pin Voltage -0.3 to +6.0 V -0.3 to VIN + 0.3 (DC) VSW Switch Pin Voltage V -2.5 to VIN + 2.0 (20ns) TST Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C TL Lead Temperature +260 °C
ESD Susceptibility (Note 5)
HBM Human Body Model 2000 V CDM Charged Device Model 500 V Notes: 4. Stresses greater than the
Absolute Maximum Ratings
specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. 2 of 5 AP64352 Databrief October 2019
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