Datasheet AD22057 (Analog Devices) - 4

AD22057
Figure 3 shows a general method for trimming the gain, either
Increasing the Gain.
The gain can be raised by connecting a upward or downward, by an amount dependent on the resistor, resistor from the output of the buffer amplifier (Pin 5) to its R. The gain range, expressed as a percentage of the overall gain, noninverting input (Pin 4) as shown in Figure 5. The gain is is given by (10 MΩ/R)%. Thus, the adjustment range would be now multiplied by the factor R/(R–100k); for example, it is ±2% for R = 5 MΩ; ± 10% for R = 1 MΩ, etc. doubled for R = 200 kΩ. Overall gains of up to ×160 (R = 114 kΩ) are readily achievable in this way. Note, however, that the accu-
ANALOG
racy of the gain becomes critically dependent on resistor value at
OUTPUT
high gains. Also, the effective input offset voltage at Pins 1 and
+IN OFS +V
8 (about six times the actual offset of A1) limits the part’s use in
S OUT VDM AD22057
very high gain, dc-coupled applications. The gain may be trimmed
–IN GND A1 A2
by using a fixed and variable resistor in series (see, for example,
R
6 Figure 10).
GAIN ADJUST 20k
V
MIN (SEE TEXT) ANALOG VCM OUTPUT ANALOG COMMON VDM = DIFFERENTIAL VOLTAGE, VCM = COMMOM-MODE VOLTAGE +IN OFS +VS OUT GAIN = ––––––––– 20R
Figure 3. Altering Gain to Accommodate Transducer
VDM AD22057 R – 100k
V
R
Scaling Error
–IN GND A1 A2 POINT X R = 100k ––––––––– GAIN
In addition to the method above, another method may be used
GAIN – 20 (SEE TEXT)
to vary the gain. Many applications will call for a gain higher
VCM ANALOG
than ×20, and some require a lower gain. Both of these situa-
COMMON
tions are readily accommodated by the addition of one external Figure 5. Achieving Gains Greater Than ×20 resistor, plus an optional potentiometer if gain adjustment is required (for example, to absorb a calibration error in a trans- Once again, a small offset voltage will arise from an imbalance ducer). in source resistances and the finite bias currents inherently present at the input of A2. In most applications this additional
Decreasing the Gain.
See Figure 4. Since the output of the offset error (about 130 µV at ×40) will be comparable with the preamplifier has an output resistance of 100 kΩ, an external specified offset range and will therefore introduce negligible resistor connected from Pin 4 to ground will precisely lower the skew. It may, however, be essentially eliminated by the addition gain by a factor R/(100k+R). When configuring the AD22057 of a resistor in series with the parallel sum of R and 100 kΩ for any gain, the maximum input and the power supply being (i.e., at “Point X” in Figure 5) so the total series resistance is used should be considered, since either the preamplifier or the maintained at 100 kΩ. For example, at a gain of ×30, when output buffer will reach its full-scale output (approximately R = 300 kΩ and the parallel sum of R and 100 kΩ is 75 kΩ, the VS – 0.2 V) with large differential input voltages. The input of padding resistor should be 25 kΩ. A 50 kΩ pot would provide the AD22057 is limited to no greater than (V – 0.2)/10, for an offset range of about ± 2.25 mV referred to the output, or overall gains less than 10, since the preamplifier, with its fixed ±75 µV referred to the attenuator input. A specific example is gain of ×10, reaches its full scale output before the output shown in Figure 12. buffer. For VS = 5 V this is 0.48 V. For gains greater than 10, however, the swing at the buffer output reaches its full-scale first
LOW-PASS FILTERING
and limits the AD22057 input to (VS – 0.2)/G, where G is the In many transducer applications it is necessary to filter the sig- overall gain. Increasing the power supply voltage increases the nal to remove spurious high frequency components, including allowable maximum input. For VS = 5 V and a nominal gain of noise, or to extract the mean value of a fluctuating signal with a 20, the maximum input is 240 mV. peak-to-average ratio (PAR) greater than unity. For example, a The overall bandwidth is unaffected by changes in gain using full wave rectified sinusoid has a PAR of 1.57, a raised cosine this method, although there may be a small offset voltage due to has a PAR of 2 and a half wave sinusoid has a PAR of 3.14. the imbalance in source resistances at the input to A2. In many Signals having large spikes may have PARs of 10 or more. cases this can be ignored but, if desired, can be nulled by insert- When implementing a filter, the PAR should be considered so ing a resistor in series with Pin 4 (at “Point X” in Figure 4) of the output of the AD22057 preamplifier (A1) does not clip value 100 kΩ minus the parallel sum of R and 100 kΩ. For before A2 does, since this nonlinearity would be averaged and example, with R = 100 kΩ (giving a total gain of ×10), the op- appear as an error at the output. To avoid this error both ampli- tional offset nulling resistor is 50 kΩ. fiers should be made to clip at the same time. This condition is achieved when the PAR is no greater than the gain of the second
ANALOG OUTPUT
amplifier (2 for the default configuration). For example, if a PAR of 5 is expected, the gain of A2 should be increased to 5.
+IN OFS +VS OUT 20R GAIN = –––––––––
Low-pass filters can be implemented in several ways using the
VDM AD22057 R + 100k
V features provided by the AD22057. In the simplest case, a
–IN GND A1 A2
single-pole filter (20 dB/decade) is formed when the output of
R = 100k ––––––––– GAIN 20 – GAIN
A1 is connected to the input of A2 via the internal 100 kΩ resis-
POINT X (SEE TEXT)
tor by strapping Pins 3 and 4, and a capacitor added from this
VCM R ANALOG
node to ground, as shown in Figure 6. The dc gain remains ×20,
COMMON
and the gain trim shown in Figure 3 may still be used. If a resis- Figure 4. Achieving Gains Less Than ×20 tor is added across the capacitor to lower the gain, the corner –4– REV. B