Datasheet AD22057 (Analog Devices) - 8

AD22057
A unique method of feedback around A1, provided by R9 and Key filter can be formed (see Low-Pass Filtering section) and R7, sets the closed-loop gain of the preamplifier to ×10 (from also provides a means for setting the overall gain to values other the input pins). The feedback network is balanced by the inclu- than ×20 (see Altering the Gain section). sion of R6 and R8. The small value of R7 results in a more The output buffer has a gain of ×2, set by the feedback network practical value for R9 (which would have to be 2 MΩ if the around op amp A2, formed by R15 and R13储R14. Note that this feedback were taken directly to the inputs of A1). R8 is not gain is not trimmed to a precise value, but may have a tolerance directly connected to ground, but to an optional voltage of one of ± 3% (max). Only the overall gain of A1 and A2 is trimmed to half that is applied to Pin 7 (OFS). It is trimmed to within close within ± 0.5% by R5. As a consequence, the gain of A1 may be tolerances through R10 and R11. This allows the output of A1 in error by ± 3% (max) as the trim to R5 absorbs the initial error to be offset to midscale, typically +VS/2, by tying Pins 6 and 7 in the gain of A2. In most applications Pins 3 and 4 are simply together. (For an example of the use of this feature, see Figure tied together, but the output buffer can be used independently if 12.) The gain is adjusted by the single resistor R5, which acts desired. The offset voltage of A2 is nulled during manufacture. only on the differential signal. More importantly, it also results R17 is included to minimize the offset due to bias currents. It is in much less feed forward of the common-mode signal to the recommended, in applications where A2 is used independently output of A1, which, being a single-supply circuit, has no means and the source resistance is less than 100 kΩ, that the necessary of pulling this output down toward ground in those circum- extra resistance should be included. stances where the common-mode input is very positive while the net differential signal is small. (The output of A1 is the collector The output of A2 is the collector of a PNP transistor whose of a PNP transistor whose emitter is tied to +V emitter is tied to +VS. The bias current out of the inverting S.) R16 is specifi- cally included to alleviate this problem. input of this amplifier generates an offset voltage of about +1 mV in R13储R14, which is passed directly to the output via R15. This The output of the preamplifier is connected to Pin 3 via R12, a sets the lowest output that can be reached when there is no load 100 kΩ resistor that is trimmed to within ± 3%. The inclusion of resistor. However, the output can drive a 1 kΩ load to at least R12 allows a low-pass filter to be formed, with an accurate time +4.5 V when +VS = +5 V. If operation to much lower minimum constant, by placing a capacitor from Pin 3 to ground. By sepa- voltages is essential, a load resistor can be added externally. rating the connections at Pins 3 and 4, a two-pole Sallen and
+VS A1 A2 AD22057 C1 R1 R18 R12 5pF 200k 1k
V
100k
V V
IN+ R19 1k
V
A1 A2 OUT IN– R2 C2 R3 R4 R17 R8 R5 200k
V
5pF 41k
V
41k
V
R9 95k
V
R15 9k
V
2.6k
V
10k
V
10k
V
R11 R6 R7 R16 R14 2k
V
250k
V
250
V
10k
V
20k
V
GND R10 R13 2k
V
20k
V
OFS
Figure 16. Simplified Schematic of AD22057, Including Component Values –8– REV. B