Datasheet LT8330 (Analog Devices) - 9

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APPLICATIONS INFORMATION
While in Burst Mode operation the current limit of the
INTVCC REGULATOR
switch is approximately 240mA resulting in the output A low dropout (LDO) linear regulator, supplied from V voltage ripple shown in Figure 2. Increasing the output IN, produces a 3V supply at the INTV capacitance will decrease the output ripple proportionally. CC pin. A minimum 1µF low ESR ceramic capacitor must be used to bypass the As the output load ramps upward from zero the switch- INTV ing frequency will increase but only up to the fixed 2MHz CC pin to ground to supply the high transient currents required by the internal power MOSFET gate driver. defined by the internal oscillator as shown in Figure 1. The output load at which the LT8330 reaches the fixed 2MHz No additional components or loading is allowed on this frequency varies based on input voltage, output voltage, pin. The INTVCC rising threshold (to allow soft start and and inductor choice. switching) is typically 2.6V. The INTVCC falling threshold (to stop switching and reset soft start) is typically 2.5V.
DUTY CYCLE CONSIDERATION
IL The LT8330 minimum on-time, minimum off-time and 200mA/DIV switching frequency (fOSC) define the allowable minimum and maximum duty cycles of the converter (see Minimum VOUT On-Time, Minimum Off-Time, and Switching Frequency 5mV/DIV in the Electrical Characteristics table). 5µs/DIV 8330 F02 Minimum Allowable Duty Cycle =
Figure 2. Burst Mode Operation
Minimum On-Time(MAX) • fOSC(MAX) Maximum Allowable Duty Cycle =
PROGRAMMING INPUT TURN-ON AND TURN-OFF
1 – Minimum Off-Time(MAX) • fOSC(MAX)
THRESHOLDS WITH EN/UVLO PIN
The required switch duty cycle range for a Boost converter The EN/UVLO pin voltage controls whether the LT8330 is operating in continuous conduction mode (CCM) can be enabled or is in a shutdown state. A 1.6V reference and a calculated as: comparator A6 with built-in hysteresis (typical 80mV) allow D the user to accurately program the system input voltage MIN = 1– VIN(MAX)/(VOUT + VD) D at which the IC turns on and off (see the Block Diagram). MAX = 1– VIN(MIN)/(VOUT + VD) The typical input falling and rising threshold voltages can where VD is the diode forward voltage drop. If the above be calculated by the following equations: duty cycle calculations for a given application violate the minimum and/or maximum allowed duty cycles for the VIN(FALLING,UVLO(–)) = 1.60 • (R3+R4)/R4 LT8330, operation in discontinuous conduction mode VIN(RISING, UVLO(+)) = 1.68 • (R3+R4)/R4 (DCM) might provide a solution. For the same VIN and V V OUT levels, operation in DCM does not demand as low a IN current is reduced below 1µA when the EN/UVLO pin duty cycle as in CCM. DCM also allows higher duty cycle voltage is less than 0.2V. The EN/UVLO pin can be con- operation than CCM. The additional advantage of DCM is nected directly to the input supply VIN for always-enabled the removal of the limitations to inductor value and duty operation. A logic input can also control the EN/UVLO pin. cycle required to avoid sub-harmonic oscillations and the When operating in Burst Mode operation for light load right half plane zero (RHPZ). While DCM provides these currents, the current through the R3 and R4 network can benefits, the trade-off is higher inductor peak current, lower easily be greater than the supply current consumed by the available output power and reduced efficiency. LT8330. Therefore, R3 and R4 should be large enough to minimize their effect on efficiency at light loads. Rev. B For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts