Datasheet VCNL36821S (Vishay) - 9
| Manufacturer | Vishay |
| Description | Proximity Sensor With Interrupt, IRED, and I²C Interface |
| Pages / Page | 16 / 9 — VCNL36821S. Command Register Format. TABLE 2 - REGISTER: ST_CONF1 … |
| File Format / Size | PDF / 194 Kb |
| Document Language | English |
VCNL36821S. Command Register Format. TABLE 2 - REGISTER: ST_CONF1 DESCRIPTION REGISTER NAME
Model Line for this Datasheet
Text Version of Document
VCNL36821S
www.vishay.com Vishay Semiconductors
Command Register Format
VCNL36821S provides an 8-bit command register for PS controlling independently. The description of each command format is shown in the following tables.
TABLE 2 - REGISTER: ST_CONF1 DESCRIPTION REGISTER NAME COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
Command Bit Description PS_INIT 7 Must be set to “1” when power on ready Reserved 6 : 2 Default = (0 : 0 : 0 : 0 : 0) Set this bit = “1” to enable bias circuit PS_SD 1
Note
• Initiallization process: step 1: set PS_SD = “1”; step 2: set PS_INIT = “1” Reserved 0 Default = 1, must always stay = 1
TABLE 3 - REGISTER: ST_CONF2 DESCRIPTION REGISTER NAME COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)
Command Bit Description Reserved 7 : 2 Default = (0 : 0 : 0 : 0 : 0) Reserved 1 Must be set to “1” when power on ready Reserved 0 Default = 0
TABLE 4 - REGISTER: PS_CONF1 DESCRIPTION REGISTER NAME COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)
Command Bit Description (0 : 0) = 10 ms, (0 : 1) = 20 ms, (1 : 0) = 40 ms, (1 : 1) = 80 ms PS_Period 7 : 6 PS sample period setting (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4 PS_PERS 5 : 4 PS interrupt persistence setting PS_ INT 3 : 2 (0 : 0) = interrupt disable, (0 : 1) = logic high / low mode, (1 : 0) = interrupt enable, (1 : 1) = reserved PS_SMART_PERS 1 0 = disable PS smart persistence, 1 = enable PS smart persistence PS_ST 0 0 = PS start, 1 = PS stop, default = 1; for active force mode set AF = 1 before setting PS_ST = 0
TABLE 5 - REGISTER: PS_CONF2 DESCRIPTION REGISTER NAME COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)
Command Bit Description PS_IT 7 : 6 (0 : 0) = 1T, (0 : 1) = 2T, (1 : 0) = 4T, (1 : 1) = 8T (0 : 0 ) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8; PS_MPS 5 : 4 PS multi-pulse setting PS_ITB 3 0: ITB = 25 μs, 1: ITB = 50 μs PS_HG 2 0 = disable, 1 = enable, PS high gain mode Reserved 1 : 0 Default = (0 : 0)
TABLE 6 - REGISTER: PS_CONF3 DESCRIPTION REGISTER NAME COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)
Rev. 1.1, 29-Jan-2020
9
Document Number: 80150 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Semiconductors
Command Register Format
VCNL36821S provides an 8-bit command register for PS controlling independently. The description of each command format is shown in the following tables.
TABLE 2 - REGISTER: ST_CONF1 DESCRIPTION REGISTER NAME COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
Command Bit Description PS_INIT 7 Must be set to “1” when power on ready Reserved 6 : 2 Default = (0 : 0 : 0 : 0 : 0) Set this bit = “1” to enable bias circuit PS_SD 1
Note
• Initiallization process: step 1: set PS_SD = “1”; step 2: set PS_INIT = “1” Reserved 0 Default = 1, must always stay = 1
TABLE 3 - REGISTER: ST_CONF2 DESCRIPTION REGISTER NAME COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)
Command Bit Description Reserved 7 : 2 Default = (0 : 0 : 0 : 0 : 0) Reserved 1 Must be set to “1” when power on ready Reserved 0 Default = 0
TABLE 4 - REGISTER: PS_CONF1 DESCRIPTION REGISTER NAME COMMAND CODE: 0x03_L (0x03 DATA BYTE LOW)
Command Bit Description (0 : 0) = 10 ms, (0 : 1) = 20 ms, (1 : 0) = 40 ms, (1 : 1) = 80 ms PS_Period 7 : 6 PS sample period setting (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4 PS_PERS 5 : 4 PS interrupt persistence setting PS_ INT 3 : 2 (0 : 0) = interrupt disable, (0 : 1) = logic high / low mode, (1 : 0) = interrupt enable, (1 : 1) = reserved PS_SMART_PERS 1 0 = disable PS smart persistence, 1 = enable PS smart persistence PS_ST 0 0 = PS start, 1 = PS stop, default = 1; for active force mode set AF = 1 before setting PS_ST = 0
TABLE 5 - REGISTER: PS_CONF2 DESCRIPTION REGISTER NAME COMMAND CODE: 0x03_H (0x03 DATA BYTE HIGH)
Command Bit Description PS_IT 7 : 6 (0 : 0) = 1T, (0 : 1) = 2T, (1 : 0) = 4T, (1 : 1) = 8T (0 : 0 ) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8; PS_MPS 5 : 4 PS multi-pulse setting PS_ITB 3 0: ITB = 25 μs, 1: ITB = 50 μs PS_HG 2 0 = disable, 1 = enable, PS high gain mode Reserved 1 : 0 Default = (0 : 0)
TABLE 6 - REGISTER: PS_CONF3 DESCRIPTION REGISTER NAME COMMAND CODE: 0x04_L (0x04 DATA BYTE LOW)
Rev. 1.1, 29-Jan-2020
9
Document Number: 80150 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
