Datasheet PI6CB33202 (Diodes) - 4

ManufacturerDiodes
DescriptionVery-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination
Pages / Page20 / 4 — PI6CB33202. SMBus Address Selection Table. SADR. Address. +Read/Write …
File Format / SizePDF / 1.2 Mb
Document LanguageEnglish

PI6CB33202. SMBus Address Selection Table. SADR. Address. +Read/Write Bit. Power Management Table. PD#. SMBus OE bit. OEn#. Qn+. Qn-

PI6CB33202 SMBus Address Selection Table SADR Address +Read/Write Bit Power Management Table PD# SMBus OE bit OEn# Qn+ Qn-

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A product Line of Diodes Incorporated
PI6CB33202 SMBus Address Selection Table SADR Address +Read/Write Bit
0 1101011 X State of SADR on First Application of PD# M 1101100 X 1 1101101 X
Power Management Table PD# IN SMBus OE bit OEn# Qn+ Qn- PLL Status
0 X X X Low(2) Low(2) Off 1 Running 0 X Low(2) Low(2) On(1) 1 Running 1 0 Running Running On(1) 1 Running 1 1 Low(2) Low(2) On(1)
Note:
1. If PLL Bypass mode is selected, the PLL will be off and outputs will be running. 2. The output state is set by B11[1:0] (Low/Low default).
PLL Operating Mode Select Table BW_SEL_TRI Operating Mode Byte1 [7:6] Readback Byte1 [4:3] Control
0 PLL with Low Bandwidth 00 00 M PLL Bypass 01 01 1 PLL with High Bandwidth 11 11
Frequency Select table Freq. Select Byte 3 [4:3] IN (MHz) Qn (MHz)
00 (default) 100 100 01 50 50 10 125 125 11 133.33 133.33 PI6CB33202 www.diodes.com January 2020 Document Number DS41834 Rev 5-2 4 Diodes Incorporated