Datasheet MAX30101 (Maxim) - 16
| Manufacturer | Maxim |
| Description | High-Sensitivity Pulse Oximeter and Heart-Rate Sensor for Wearable Health |
| Pages / Page | 33 / 16 — FIFO Data Contains 3 Bytes per Channel. Write/Read Pointers. Table 2. … |
| File Format / Size | PDF / 1.0 Mb |
| Document Language | English |
FIFO Data Contains 3 Bytes per Channel. Write/Read Pointers. Table 2. FIFO Data (3 Bytes per Channel)
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link to page 16 MAX30101 High-Sensitivity Pulse Oximeter and Heart-Rate Sensor for Wearable Health
FIFO Data Contains 3 Bytes per Channel
The FIFO data is left-justified, meaning that the MSB is always in the same location regardless of the ADC resolution setting. FIFO DATA[18] – [23] are not used. Table 2 shows the structure of each triplet of bytes (containing the 18-bit ADC data output of each channel). Each data sample in SpO2 mode comprises two data triplets (3 bytes each), To read one sample, requires an I2C read command for each byte. Thus, to read one sample in SpO2 mode, requires 6 I2C byte reads. To read one sample with three LED channels requires 9 I2C byte reads. The FIFO read pointer is automatically incremented after the first byte of each sample is read.
Write/Read Pointers
Write/Read pointers are used to control the flow of data in the FIFO. The write pointer increments every time a new sample is added to the FIFO. The read pointer is incremented every time a sample is read from the FIFO. To reread a sample from the FIFO, decrement its value by one and read the data register again. The FIFO write/read pointers should be cleared (back to 0x00) upon entering SpO2 mode or HR mode, so that there is no old data represented in the FIFO. The pointers are automatically cleared if VDD is power-cycled or VDD drops below its UVLO voltage.
Table 2. FIFO Data (3 Bytes per Channel)
BYTE 1 FIFO_ FIFO_ DATA[17] DATA[16] BYTE 2 FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ DATA[15] DATA[14] DATA[13] DATA[12] DATA[11] DATA[10] DATA[9] DATA[8] BYTE 3 FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ DATA[7] DATA[6] DATA[5] DATA[4] DATA[3] DATA[2] DATA[1] DATA[0] Sample 2: LED Channel 3 (Byte 1-3) Sample 2: LED Channel 2 NEWER NEWER (Byte 1-3) SAMPLES Sample 2: IR Channel (Byte 1-3) SAMPLES Sample 2: LED Channel 1 (Byte 1-3) Sample 2: RED Channel (Byte 1-3) Sample 1: LED Channel 3 (Byte 1-3) Sample 1: IR Channel (Byte 1-3) Sample 1: LED Channel 2 (Byte 1-3) Sample 1: RED Channel (Byte 1-3) Sample 1: LED Channel 1 (Byte 1-3) OLDER SAMPLES OLDER SAMPLES 2(a) 2(b) Figure 2a and 2b. Graphical Representation of the FIFO Data Register. The left shows three LEDs in multi-LED mode, and the right shows IR and Red only in SpO2 Mode. 2(a) www.maximintegrated.com Maxim Integrated │
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FIFO Data Contains 3 Bytes per Channel
The FIFO data is left-justified, meaning that the MSB is always in the same location regardless of the ADC resolution setting. FIFO DATA[18] – [23] are not used. Table 2 shows the structure of each triplet of bytes (containing the 18-bit ADC data output of each channel). Each data sample in SpO2 mode comprises two data triplets (3 bytes each), To read one sample, requires an I2C read command for each byte. Thus, to read one sample in SpO2 mode, requires 6 I2C byte reads. To read one sample with three LED channels requires 9 I2C byte reads. The FIFO read pointer is automatically incremented after the first byte of each sample is read.
Write/Read Pointers
Write/Read pointers are used to control the flow of data in the FIFO. The write pointer increments every time a new sample is added to the FIFO. The read pointer is incremented every time a sample is read from the FIFO. To reread a sample from the FIFO, decrement its value by one and read the data register again. The FIFO write/read pointers should be cleared (back to 0x00) upon entering SpO2 mode or HR mode, so that there is no old data represented in the FIFO. The pointers are automatically cleared if VDD is power-cycled or VDD drops below its UVLO voltage.
Table 2. FIFO Data (3 Bytes per Channel)
BYTE 1 FIFO_ FIFO_ DATA[17] DATA[16] BYTE 2 FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ DATA[15] DATA[14] DATA[13] DATA[12] DATA[11] DATA[10] DATA[9] DATA[8] BYTE 3 FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ FIFO_ DATA[7] DATA[6] DATA[5] DATA[4] DATA[3] DATA[2] DATA[1] DATA[0] Sample 2: LED Channel 3 (Byte 1-3) Sample 2: LED Channel 2 NEWER NEWER (Byte 1-3) SAMPLES Sample 2: IR Channel (Byte 1-3) SAMPLES Sample 2: LED Channel 1 (Byte 1-3) Sample 2: RED Channel (Byte 1-3) Sample 1: LED Channel 3 (Byte 1-3) Sample 1: IR Channel (Byte 1-3) Sample 1: LED Channel 2 (Byte 1-3) Sample 1: RED Channel (Byte 1-3) Sample 1: LED Channel 1 (Byte 1-3) OLDER SAMPLES OLDER SAMPLES 2(a) 2(b) Figure 2a and 2b. Graphical Representation of the FIFO Data Register. The left shows three LEDs in multi-LED mode, and the right shows IR and Red only in SpO2 Mode. 2(a) www.maximintegrated.com Maxim Integrated │
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