Everest SemiconductorConfidentialES83111. BLOCK DIAGRAM CD ASD DS M CLK CCLK A LR S OU CE T CLK DI CK A T N Clock Mgr I2C I2S/PCM OUTP MIC1P ADC ALC Mono HP Driver Mono PGA DAC DRC ADC DAC OUTN MIC1N Noise Filter Analog Reference Power Supply VM DA A A A DGND P DV D GND VD VD I CV CV D D D D D R R E E F F Revision 7.0 2 January 2020 Latest datasheet: www.everest-semi.com or info@everest-semi.com Document Outline Block Diagram Pin Out and Description typical APPLICATION CIRCUIT Clock Modes and Sampling Frequencies Micro-controller configuration Interface Digital Audio Interface ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Recommended Operating Conditions ADC Analog and Filter Characteristics and Specifications DAC Analog and Filter Characteristics and Specifications DC Characteristics Serial Audio Port Switching Specifications I2C Switching Specifications (slow speed mode/high speed mode) Package CORPORATe INFORMATION