Product Brief AVR-DA (Microchip) - 6
| Manufacturer | Microchip |
| Description | AVR-DA family of microcontrollers is using the AVR CPU with hardware multiplier, running at up to 24 MHz, with 32/64/128 KB of Flash, 4/8/16 KB of SRAM, and 512 bytes of EEPROM in 28-, 32-, 48-or 64-pin packages |
| Pages / Page | 15 / 6 — AVR-DA. Block Diagram. CPU. Product Brief |
| File Format / Size | PDF / 207 Kb |
| Document Language | English |
AVR-DA. Block Diagram. CPU. Product Brief
Model Line for this Datasheet
Text Version of Document
AVR-DA Block Diagram 1. Block Diagram
Legend: M = Master S = Slave UPDI
CPU
UPDI OCD CRC Flash M M M S SRAM S BUS Matrix S EEPROM S I NVMCTRL N PORT / AINPn Pxn O AINNn ACn PORTMUX U OUT T E GPR D AINn ADCn V A E D T N A A Detectors / ZCIN T T CPUINT B VDD ZCDn Power Control OUT A U B S U System POR VREG OUT DACn R S Management RESET O BOD VLM Xn U RSTCTRL PTC T Yn I VREFA VREF N CLKCTRL G WOn TCAn N SLPCTRL E Clock Generation T PLL WO TCBn CLKOUT W O R WDT OSCHF EXTCLK WOx TCDn K RxD OSC32K TxD XTAL32K2 XCK USARTn RTC XDIR XOSC32K MISO XTAL32K1 MOSI SCK SPIn EVSYS EVOUTx SS SDA (Master) LUTn-OUT CCL SCL (Master) LUTn-INn SDA (Slave) TWIn SCL (Slave) © 2020 Microchip Technology Inc.
Product Brief
DS40002164A-page 6 Document Outline Introduction Features AVR-DA Family Overview 1. Memory Overview 2. Peripheral Overview Table of Contents 1. Block Diagram 2. Pinout 2.1. 28-Pin SPDIP, SSOP and SOIC 2.2. 32-Pin VQFN and TQFP 2.3. 48-Pin VQFN and TQFP 2.4. 64-Pin VQFN and TQFP 3. I/O Multiplexing and Considerations 3.1. I/O Multiplexing The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
Legend: M = Master S = Slave UPDI
CPU
UPDI OCD CRC Flash M M M S SRAM S BUS Matrix S EEPROM S I NVMCTRL N PORT / AINPn Pxn O AINNn ACn PORTMUX U OUT T E GPR D AINn ADCn V A E D T N A A Detectors / ZCIN T T CPUINT B VDD ZCDn Power Control OUT A U B S U System POR VREG OUT DACn R S Management RESET O BOD VLM Xn U RSTCTRL PTC T Yn I VREFA VREF N CLKCTRL G WOn TCAn N SLPCTRL E Clock Generation T PLL WO TCBn CLKOUT W O R WDT OSCHF EXTCLK WOx TCDn K RxD OSC32K TxD XTAL32K2 XCK USARTn RTC XDIR XOSC32K MISO XTAL32K1 MOSI SCK SPIn EVSYS EVOUTx SS SDA (Master) LUTn-OUT CCL SCL (Master) LUTn-INn SDA (Slave) TWIn SCL (Slave) © 2020 Microchip Technology Inc.
Product Brief
DS40002164A-page 6 Document Outline Introduction Features AVR-DA Family Overview 1. Memory Overview 2. Peripheral Overview Table of Contents 1. Block Diagram 2. Pinout 2.1. 28-Pin SPDIP, SSOP and SOIC 2.2. 32-Pin VQFN and TQFP 2.3. 48-Pin VQFN and TQFP 2.4. 64-Pin VQFN and TQFP 3. I/O Multiplexing and Considerations 3.1. I/O Multiplexing The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
