Datasheet ADP1071-1, ADP1071-2 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Isolated Synchronous Flyback Controller with Integrated iCoupler |
| Pages / Page | 27 / 3 — Data Sheet. ADP1071-1. /ADP1071-2. SPECIFICATIONS. Table 1. Parameter. … |
| Revision | B |
| File Format / Size | PDF / 577 Kb |
| Document Language | English |
Data Sheet. ADP1071-1. /ADP1071-2. SPECIFICATIONS. Table 1. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP1071-1 /ADP1071-2 SPECIFICATIONS
ADP1071-1: VREG1 = 9 V, VDD2 = 12 V, TA = −40°C to +125°C, unless otherwise noted. ADP1071-2: VIN = 24 V, VDD2 = 12 V, TA = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
ADP1071-1 SUPPLY (PRIMARY) Supply Voltage VREG1 1 µF capacitor from VREG1 to AGND1 4.7 8 12.5 V Quiescent Supply IVREG1 VREG1 > VREG1 UVLO, GATE pin unloaded Current At 100 kHz 3.8 mA At 300 kHz 4.6 mA At 600 kHz 6.8 mA IVREG1 VREG1 > VREG1 UVLO, GATE pin loaded with 2.2 nF At 100 kHz 5.5 mA At 300 kHz 10 mA At 600 kHz 16.6 mA VREG1 Start-Up Current IVREG1_STARTUP VEN < 1.2 V 160 µA VREG1 UVLO VREG1 rising 4.7 V VREG1 falling 4 V UVLO Hysteresis 0.19 V ADP1071-2 SUPPLY (PRIMARY) Supply Voltage VIN 4.7 µF capacitor from VIN to AGND1, 4.7 24 60 V 1 µF capacitor from VREG1 to AGND1 Quiescent Supply IVIN VIN > VIN UVLO, GATE pin unloaded Current At 100 kHz 3.8 mA At 300 kHz 4.4 mA At 600 kHz 6.8 mA IVIN VIN > VIN UVLO, GATE pin loaded with 2.2 nF At 100 kHz 5.5 mA At 300 kHz 11 mA At 600 kHz 22 mA VIN Shutdown Current EN pin voltage (VEN) < 1.2 V, VREG1 = 0 V, 55 µA VIN = 60 V VIN and VREG1 Start-Up IVIN_STARTUP VEN < 1.2 V, VREG1 = 12 V, VIN = 12 V 160 µA Current VIN UVLO VIN rising 4.7 V VIN falling 4 V UVLO Hysteresis 0.19 V SWITCHING TIME Time from EN High to VEN > 1.2 V, 1 µF capacitor on VREG1 1 ms GATE Output Switching Time from EN Low to VEN < 1.0 V, 1 µF capacitor on VREG1 1 µs GATE Output Stops Switching Rev. B | Page 3 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Insulation and Safety Related Specifications Regulatory Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Detailed Block Diagram Primary Side Supply, Input Voltage, and LDO Secondary Side Supply and LDO Precision Enable Soft Start Procedure Output Voltage Sensing and Feedback Loop Compensation and Steady State Operation Slope Compensation Input/Output Current-Limit Protection Temperature Sensing Frequency Setting (RT Pin) Maximum Duty Cycle Frequency Synchronization Synchronous Rectifier (SR) Driver Output Overvoltage Protection (OVP) SR Dead Time Light Load Mode (LLM) and Continuous Conduction Mode (CCM) Soft Stop OCP/Feedback Recovery Output Voltage Tracking Remote System Reset OCP Counter External Start-Up Circuit Insulation Lifetime Layout Guidelines Applications Information Typical Application Circuits Outline Dimensions Ordering Guide
ADP1071-1: VREG1 = 9 V, VDD2 = 12 V, TA = −40°C to +125°C, unless otherwise noted. ADP1071-2: VIN = 24 V, VDD2 = 12 V, TA = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
ADP1071-1 SUPPLY (PRIMARY) Supply Voltage VREG1 1 µF capacitor from VREG1 to AGND1 4.7 8 12.5 V Quiescent Supply IVREG1 VREG1 > VREG1 UVLO, GATE pin unloaded Current At 100 kHz 3.8 mA At 300 kHz 4.6 mA At 600 kHz 6.8 mA IVREG1 VREG1 > VREG1 UVLO, GATE pin loaded with 2.2 nF At 100 kHz 5.5 mA At 300 kHz 10 mA At 600 kHz 16.6 mA VREG1 Start-Up Current IVREG1_STARTUP VEN < 1.2 V 160 µA VREG1 UVLO VREG1 rising 4.7 V VREG1 falling 4 V UVLO Hysteresis 0.19 V ADP1071-2 SUPPLY (PRIMARY) Supply Voltage VIN 4.7 µF capacitor from VIN to AGND1, 4.7 24 60 V 1 µF capacitor from VREG1 to AGND1 Quiescent Supply IVIN VIN > VIN UVLO, GATE pin unloaded Current At 100 kHz 3.8 mA At 300 kHz 4.4 mA At 600 kHz 6.8 mA IVIN VIN > VIN UVLO, GATE pin loaded with 2.2 nF At 100 kHz 5.5 mA At 300 kHz 11 mA At 600 kHz 22 mA VIN Shutdown Current EN pin voltage (VEN) < 1.2 V, VREG1 = 0 V, 55 µA VIN = 60 V VIN and VREG1 Start-Up IVIN_STARTUP VEN < 1.2 V, VREG1 = 12 V, VIN = 12 V 160 µA Current VIN UVLO VIN rising 4.7 V VIN falling 4 V UVLO Hysteresis 0.19 V SWITCHING TIME Time from EN High to VEN > 1.2 V, 1 µF capacitor on VREG1 1 ms GATE Output Switching Time from EN Low to VEN < 1.0 V, 1 µF capacitor on VREG1 1 µs GATE Output Stops Switching Rev. B | Page 3 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Insulation and Safety Related Specifications Regulatory Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Detailed Block Diagram Primary Side Supply, Input Voltage, and LDO Secondary Side Supply and LDO Precision Enable Soft Start Procedure Output Voltage Sensing and Feedback Loop Compensation and Steady State Operation Slope Compensation Input/Output Current-Limit Protection Temperature Sensing Frequency Setting (RT Pin) Maximum Duty Cycle Frequency Synchronization Synchronous Rectifier (SR) Driver Output Overvoltage Protection (OVP) SR Dead Time Light Load Mode (LLM) and Continuous Conduction Mode (CCM) Soft Stop OCP/Feedback Recovery Output Voltage Tracking Remote System Reset OCP Counter External Start-Up Circuit Insulation Lifetime Layout Guidelines Applications Information Typical Application Circuits Outline Dimensions Ordering Guide
