Datasheet ADP1071-1, ADP1071-2 (Analog Devices) - 4

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ADP1071-1 /ADP1071-2 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
SUPPLY (SECONDARY) Supply Voltage VDD2 4.7 µF capacitor from VDD2 to AGND2, 1 µF 4.5 12 36 V capacitor from VREG2 to AGND2 Quiescent Supply IDD2 SR unloaded Current At 100 kHz 5.3 mA At 300 kHz 5.5 mA At 600 kHz 5.6 mA IDD2 SR loaded with 2.2 nF At 100 kHz 6.4 mA At 300 kHz 8.7 mA At 600 kHz 12.1 mA VDD2 UVLO Threshold VDD2 rising 3.55 V VDD2 falling 3 V UVLO Hysteresis 145 mV Secondary UVLO 200 ms Hiccup Time OSCILLATOR Switching Frequency RT resistance (RRT) = 480 kΩ (±1%) 50 − 10% 50 50 + 10% kHz (fS) RRT = 240 kΩ (±1%) 100 − 10% 100 100 + 10% kHz RRT = 120 kΩ (±1%) 200 − 10% 200 200 + 10% kHz RRT = 80 kΩ (±1%) 300 − 10% 300 300 + 10% kHz RRT = 60 kΩ (±1%) 400 − 10% 400 400 + 10% kHz RRT = 40 kΩ (±1%) 600 − 10% 600 600 + 10% kHz VREG1 PIN VREG1 Voltage Clamp VREG1 current (IVREG1) = 3 mA, VEN < 1.2 V 13.5 14.3 15.2 V VREG1 Clamp Series VREG1 forced current of 5 mA and 10 mA 16 Ω Resistance GATE DRIVERS (PRIMARY) GATE High Voltage IVREG1 = 20 mA, VIN > 9 V (ADP1071-2 only) 7.8 8 8.2 V Gate Short-Circuit Peak 8 V on VREG1 1.0 A Current1 GATE Rise Time GATE loaded with 2.2 nF, 10% to 90% 17 ns GATE Fall Time GATE loaded with 2.2 nF, 90% to 10% 15 ns GATE Source Resistance RON_SOURCE Source = 100 mA 4 Ω GATE Sink Resistance RON_SINK Sink = 100 mA 2 Ω GATE Maximum Duty 84 % Cycle GATE Minimum On At 300 kHz, includes blanking time 175 ns Time SR DRIVER (SECONDARY) SR High Voltage IVREG2 = 15 mA, VDD2 > 5.5 V 4.9 5 5.1 V SR Short Circuit Peak 5 V on VREG2 1.0 A Current1 SR Rise Time SR loaded with 2.2 nF, 10% to 90% 13 ns SR Fall Time SR loaded with 2.2 nF, 90% to 10% 10 ns SR Minimum On Time At 300 kHz 462 ns SR Source Resistance RON_SR_SOURCE Source = 100 mA 3 Ω SR Sink Resistance RON_SR_SINK Sink = 100 mA 1.5 Ω DEAD TIME SETTING Dead time between SR falling and GATE 30 ns (GATE TO SR) rising Dead time between GATE falling and SR 52 ns rising Rev. B | Page 4 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Insulation and Safety Related Specifications Regulatory Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Detailed Block Diagram Primary Side Supply, Input Voltage, and LDO Secondary Side Supply and LDO Precision Enable Soft Start Procedure Output Voltage Sensing and Feedback Loop Compensation and Steady State Operation Slope Compensation Input/Output Current-Limit Protection Temperature Sensing Frequency Setting (RT Pin) Maximum Duty Cycle Frequency Synchronization Synchronous Rectifier (SR) Driver Output Overvoltage Protection (OVP) SR Dead Time Light Load Mode (LLM) and Continuous Conduction Mode (CCM) Soft Stop OCP/Feedback Recovery Output Voltage Tracking Remote System Reset OCP Counter External Start-Up Circuit Insulation Lifetime Layout Guidelines Applications Information Typical Application Circuits Outline Dimensions Ordering Guide