Datasheet AD5593R (Analog Devices) - 31
| Manufacturer | Analog Devices |
| Description | 8-Channel, 12-Bit, Configurable ADC/DAC with On-Chip Reference, I2C Interface |
| Pages / Page | 33 / 31 — Data Sheet. AD5593R. APPLICATIONS INFORMATION MICROPROCESSOR INTERFACING. … |
| Revision | D |
| File Format / Size | PDF / 802 Kb |
| Document Language | English |
Data Sheet. AD5593R. APPLICATIONS INFORMATION MICROPROCESSOR INTERFACING. LAYOUT GUIDELINES. AD5593R TO. ADSP-BF537 INTERFA
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Data Sheet AD5593R APPLICATIONS INFORMATION MICROPROCESSOR INTERFACING LAYOUT GUIDELINES
Microprocessor interfacing to the AD5593R is via a serial bus using In any circuit where accuracy is important, careful consideration a standard I2C protocol. The communications channel requires a of the power supply and ground return layout helps to ensure 2-wire interface consisting of a clock signal and a data signal. the rated performance. The printed circuit board (PCB) on which the AD5593R is mounted must be designed so that the
AD5593R TO ADSP-BF537 INTERFA CE
AD5593R lies on the analog plane. The I2C interface of the AD5593R is designed to be easily The AD5593R must have ample supply bypassing of 10 μF in connected to industry-standard DSPs and microcontrollers. parallel with 0.1 μF on each supply, located as close to the package Figure 41 shows the AD5593R connected to the Analog Devices as possible, ideally right up against the device. The 10 μF capacitors Blackfin® DSP. The Blackfin has an integrated I2C port that can are the tantalum bead type. The 0.1 μF capacitor must have low be connected directly to the I2C pins of the AD5593R. effective series resistance (ESR) and low effective series inductance
AD5593R
(ESI) such as the common ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents due to internal logic switching.
ADSP-BF537 SCL SCL SDA SDA
4 16
PF8 RESET
7- 50 12 Figure 41. ADSP-BF537 Interface Rev. D | Page 31 of 33 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Characteristics Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation DAC Section Resistor String DAC Output Buffer ADC Section Calculating ADC Input Current GPIO Section Internal Reference Reset Function Temperature Indicator Serial Interface Write Operation Read Operation Pointer Byte Control Registers General-Purpose Control Register Configuring the AD5593R DAC Write Operation LDAC Mode Operation DAC Readback ADC Operation GPIO Operation Setting Pins as Outputs Setting Pins as Inputs Three-State Pins 85 kΩ Pull-Down Pins Power-Down/Reference Control Reset Function Applications Information Microprocessor Interfacing AD5593R to ADSP-BF537 Interface Layout Guidelines Outline Dimensions Ordering Guide
Data Sheet AD5593R APPLICATIONS INFORMATION MICROPROCESSOR INTERFACING LAYOUT GUIDELINES
Microprocessor interfacing to the AD5593R is via a serial bus using In any circuit where accuracy is important, careful consideration a standard I2C protocol. The communications channel requires a of the power supply and ground return layout helps to ensure 2-wire interface consisting of a clock signal and a data signal. the rated performance. The printed circuit board (PCB) on which the AD5593R is mounted must be designed so that the
AD5593R TO ADSP-BF537 INTERFA CE
AD5593R lies on the analog plane. The I2C interface of the AD5593R is designed to be easily The AD5593R must have ample supply bypassing of 10 μF in connected to industry-standard DSPs and microcontrollers. parallel with 0.1 μF on each supply, located as close to the package Figure 41 shows the AD5593R connected to the Analog Devices as possible, ideally right up against the device. The 10 μF capacitors Blackfin® DSP. The Blackfin has an integrated I2C port that can are the tantalum bead type. The 0.1 μF capacitor must have low be connected directly to the I2C pins of the AD5593R. effective series resistance (ESR) and low effective series inductance
AD5593R
(ESI) such as the common ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents due to internal logic switching.
ADSP-BF537 SCL SCL SDA SDA
4 16
PF8 RESET
7- 50 12 Figure 41. ADSP-BF537 Interface Rev. D | Page 31 of 33 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Characteristics Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation DAC Section Resistor String DAC Output Buffer ADC Section Calculating ADC Input Current GPIO Section Internal Reference Reset Function Temperature Indicator Serial Interface Write Operation Read Operation Pointer Byte Control Registers General-Purpose Control Register Configuring the AD5593R DAC Write Operation LDAC Mode Operation DAC Readback ADC Operation GPIO Operation Setting Pins as Outputs Setting Pins as Inputs Three-State Pins 85 kΩ Pull-Down Pins Power-Down/Reference Control Reset Function Applications Information Microprocessor Interfacing AD5593R to ADSP-BF537 Interface Layout Guidelines Outline Dimensions Ordering Guide
