Datasheet MAX32670 (Maxim) - 10
| Manufacturer | Maxim |
| Description | High Reliability, Ultra-Low Power Microcontroller Powered by Arm Cortex M4 Processor with FPU for Industrial and IoT |
| Pages / Page | 44 / 10 — Electrical Characteristics (continued). PARAMETER. SYMBOL. CONDITIONS. … |
| File Format / Size | PDF / 530 Kb |
| Document Language | English |
Electrical Characteristics (continued). PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS
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MAX32670 High Reliability, Ultra-Low Power Microcontroller Powered by Arm Cortex M4 Processor with FPU for Industrial and IoT
Electrical Characteristics (continued)
(Limits are 100% tested at TA = +25ºC and TA = +105ºC. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OVR = [10], internal regulator Dynamic, IPO set to 1.1V, 49.3 enabled, total fSYS_CLK(MAX) = current into V 100MHz DD pin, VDD = 1.8V, OVR = [01], CPU in Active internal regulator mode, executing set to 1.0V, 46.7 While(1), ECC fSYS_CLK(MAX) = disabled, inputs 50MHz tied to VSS or VDD, OVR = [00], outputs source/sink internal regulator 0mA set to 0.9V, 44.1 fSYS_CLK(MAX) = 12MHz Fixed, IPO OVR = [10], enabled, total internal regulator 796 current into VDD set to 1.1V pin, VDD = 3.3V, OVR = [01], CPU in Active internal regulator 647 mode 0MHz set to 1.0V execution, ECC disabled, inputs OVR = [00], tied to VSS or VDD, internal regulator 475 outputs source/sink set to 0.9V 0mA IDD_FACTS μA Fixed, IPO OVR = [10], enabled, total internal regulator 762 current into VDD set to 1.1V pin, VDD = 1.8V, OVR = [01], CPU in Active internal regulator 620 mode 0MHz set to 1.0V execution, ECC disabled, inputs OVR = [00], tied to VSS or VDD, internal regulator 450 outputs source/sink set to 0.9V 0mA 19-100782 www.maximintegrated.com Maxim Integrated | 10 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 40 TQFN-EP Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Slave Pin Configuration 40 TQFN Pin Description 40 TQFN Detailed Description MAX32670 Arm Cortex-M4 Processor with FPU Engine Memory Internal Flash Memory Internal SRAM Clocking Scheme General-Purpose I/O and Special Function Pins Standard DMA Controller Power Management Power Management Unit Active Mode Sleep Mode DeepSleep Mode Backup Mode Storage Mode Real-Time Clock Windowed Watchdog Timer (WWDT) 32-Bit Timer/Counter/PWM (TMR, LPTMR) Serial Peripherals I2C Interface (I2C) Serial Peripheral Interface (SPI) I2S Interface (I2S) UART (UART, LPUART) Security AES True Random Number Generator (TRNG) CRC Module Secure Boot Debug and Development Interface (SWD) Applications Information Bypass Capacitors Ordering Information Revision History
Electrical Characteristics (continued)
(Limits are 100% tested at TA = +25ºC and TA = +105ºC. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OVR = [10], internal regulator Dynamic, IPO set to 1.1V, 49.3 enabled, total fSYS_CLK(MAX) = current into V 100MHz DD pin, VDD = 1.8V, OVR = [01], CPU in Active internal regulator mode, executing set to 1.0V, 46.7 While(1), ECC fSYS_CLK(MAX) = disabled, inputs 50MHz tied to VSS or VDD, OVR = [00], outputs source/sink internal regulator 0mA set to 0.9V, 44.1 fSYS_CLK(MAX) = 12MHz Fixed, IPO OVR = [10], enabled, total internal regulator 796 current into VDD set to 1.1V pin, VDD = 3.3V, OVR = [01], CPU in Active internal regulator 647 mode 0MHz set to 1.0V execution, ECC disabled, inputs OVR = [00], tied to VSS or VDD, internal regulator 475 outputs source/sink set to 0.9V 0mA IDD_FACTS μA Fixed, IPO OVR = [10], enabled, total internal regulator 762 current into VDD set to 1.1V pin, VDD = 1.8V, OVR = [01], CPU in Active internal regulator 620 mode 0MHz set to 1.0V execution, ECC disabled, inputs OVR = [00], tied to VSS or VDD, internal regulator 450 outputs source/sink set to 0.9V 0mA 19-100782 www.maximintegrated.com Maxim Integrated | 10 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 40 TQFN-EP Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Slave Pin Configuration 40 TQFN Pin Description 40 TQFN Detailed Description MAX32670 Arm Cortex-M4 Processor with FPU Engine Memory Internal Flash Memory Internal SRAM Clocking Scheme General-Purpose I/O and Special Function Pins Standard DMA Controller Power Management Power Management Unit Active Mode Sleep Mode DeepSleep Mode Backup Mode Storage Mode Real-Time Clock Windowed Watchdog Timer (WWDT) 32-Bit Timer/Counter/PWM (TMR, LPTMR) Serial Peripherals I2C Interface (I2C) Serial Peripheral Interface (SPI) I2S Interface (I2S) UART (UART, LPUART) Security AES True Random Number Generator (TRNG) CRC Module Secure Boot Debug and Development Interface (SWD) Applications Information Bypass Capacitors Ordering Information Revision History
