Datasheet AD8361 (Analog Devices) - 9

Data Sheet AD8361 GATE PULSE FOR PWDN INPUT 900MHz RF TONE 370mV 500mV PER 370mV VERTICAL DIVISION 270mV 270mV 500mV PER VERTICAL DIVISION RF INPUT RF INPUT 67mV 67mV 25mV 25mV 5
µ
s PER HORIZONTAL DIVISION 2
µ
s PER HORIZONTAL DIVISION
01088-C-024 01088-C-027 Figure 24. Output Response to Modulated Pulse Input for Various RF Input Figure 27. Output Response Using Power-Down Mode for Various RF Input Levels, Supply 3 V, Modulation Frequency 900 MHz, No Filter Capacitor Levels, Supply 3 V, Frequency 900 MHz, No Filter Capacitor
GATE PULSE FOR 900MHz RF TONE PWDN INPUT 370mV 500mV PER 370mV VERTICAL DIVISION 270mV 270mV 500mV PER VERTICAL RF INPUT DIVISION RF INPUT 67mV 67mV 25mV 25mV 50
µ
s PER HORIZONTAL DIVISION 20
µ
s PER HORIZONTAL DIVISION
01088-C-025 01088-C-028 Figure 25. Output Response to Modulated Pulse Input for Various RF Input Figure 28. Output Response Using Power-Down Mode for Various RF Input Levels, Supply 3 V, Modulation Frequency 900 MHz, 0.01 µF Filter Capacitor Levels, Supply 3 V, Frequency 900 MHz, 0.01 µF Filter Capacitor
HPE3631A HPE3631A POWER SUPPLY TEK TDS784C POWER SUPPLY TEK TDS784C SCOPE SCOPE C4 C2 AD8361 C4 C2 0.01
µ
F 100pF AD8361 0.01
µ
F 100pF 1 VPOS SREF 8 1 VPOS SREF 8 TEK P6204 2 IREF VRMS 7 TEK P6204 FET PROBE 2 IREF VRMS 7 C1 C3 FET PROBE C1 C3 3 RFIN FLTR 6 C5 3 RFIN FLTR 6 C5 R1 0.1
µ
F 100pF R1 100pF 75
Ω
0.1
µ
F 4 PWDN COMM 5 75
Ω
4 PWDN COMM 5 HP8648B HP8648B SIGNAL SIGNAL HP8110A GENERATOR SIGNAL
01088-C-026
GENERATOR GENERATOR
01088-C-029 Figure 26. Hardware Configuration for Figure 29. Hardware Configuration Output Response to Modulated Pulse Input for Output Response Using Power-Down Mode Rev. F | Page 9 of 22 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION Filtering Offset APPLICATION INFORMATION Basic Connections Output Swing Dynamic Range Input Coupling and Matching Input Coupling Using a Series Resistor Selecting the Filter Capacitor Operation at Low Frequencies Power Consumption, Enable and Power-On Volts to dBm Conversion Output Drive Capability and Buffering OUTPUT REFERENCE TEMPERATURE DRIFT COMPENSATION Extended Frequency Characterization EVALUATION BOARD CHARACTERIZATION SETUPS Equipment Analysis OUTLINE DIMENSIONS ORDERING GUIDE