Datasheet HMC974 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 10 GHz, High Speed Window Comparator |
| Pages / Page | 12 / 6 — HMC974LC3C. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. RT … |
| Revision | E |
| File Format / Size | PDF / 351 Kb |
| Document Language | English |
HMC974LC3C. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. RT 1. 12 ORB. WIN 2. 11 WOUTB. TOP VIEW. (Not to Scale). WIT 3. 10 URB
Model Line for this Datasheet
Text Version of Document
HMC974LC3C Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS I N O CC EE CC V RT V V 16 15 14 13 RT 1 12 ORB WIN 2 11 WOUTB HMC974LC3C TOP VIEW (Not to Scale) WIT 3 10 URB RB 4 9 VCCO 5 6 7 8 PACKAGE I BASE CC LE LE EE V V VEE NOTES
-003
1. EXPOSED PAD. THE EXPOSED PAD MUST
863
BE CONNECTED TO VEE.
14 Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 RT Termination Resistor for Reference Top. 2 WIN Analog Input Window. 3 WIT Common Mode Window for Termination Resistors. 4 RB Termination Resistor Return for Reference Bottom. 5, 16 VCCI Positive Supply Voltage Input Stage. 6 LE Inverting Latch Enable Input. 7 LE Noninverting Latch Enable Input. 8, 14 VEE Negative Power Supply 9, 13 VCCO Positive Supply Voltage Output Stage. 10 URB Underange Output. URB is asserted low when the analog input voltage is below the RB pin voltage. 11 WOUTB Window Output. WOUTB is asserted low when the analog input voltage is between the RB pin voltage and the RT pin voltage. 12 ORB Overrange output. ORB is asserted low when the analog input voltage range is above the RT pin voltage. 15 RTN ESD Protection Return. EPAD Exposed Pad. The exposed pad must be connected to VEE. Rev. E | Page 6 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
-003
1. EXPOSED PAD. THE EXPOSED PAD MUST
863
BE CONNECTED TO VEE.
14 Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 RT Termination Resistor for Reference Top. 2 WIN Analog Input Window. 3 WIT Common Mode Window for Termination Resistors. 4 RB Termination Resistor Return for Reference Bottom. 5, 16 VCCI Positive Supply Voltage Input Stage. 6 LE Inverting Latch Enable Input. 7 LE Noninverting Latch Enable Input. 8, 14 VEE Negative Power Supply 9, 13 VCCO Positive Supply Voltage Output Stage. 10 URB Underange Output. URB is asserted low when the analog input voltage is below the RB pin voltage. 11 WOUTB Window Output. WOUTB is asserted low when the analog input voltage is between the RB pin voltage and the RT pin voltage. 12 ORB Overrange output. ORB is asserted low when the analog input voltage range is above the RT pin voltage. 15 RTN ESD Protection Return. EPAD Exposed Pad. The exposed pad must be connected to VEE. Rev. E | Page 6 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
