Datasheet ADCMP567 (Analog Devices)

ManufacturerAnalog Devices
DescriptionDual Ultrafast Voltage Comparator
Pages / Page14 / 1 — Dual Ultrafast Voltage Comparator. Data Sheet. ADCMP567. FEATURES. …
RevisionA
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Document LanguageEnglish

Dual Ultrafast Voltage Comparator. Data Sheet. ADCMP567. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet ADCMP567 Analog Devices, Revision: A

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Dual Ultrafast Voltage Comparator Data Sheet ADCMP567 FEATURES FUNCTIONAL BLOCK DIAGRAM 250 ps propagation delay input to output 50 ps propagation delay dispersion NONINVERTING INPUT Q OUTPUT Differential PECL compatible outputs ADCMP567 Differential latch control INVERTING Q OUTPUT INPUT Robust input protection Input common-mode range −2.0 V to +3.0 V LATCH ENABLE LATCH ENABLE INPUT INPUT Input differential range ±5 V 03632-0-001 ESD protection >3 kV HBM, >200 V MM
Figure 1.
Power supply sensitivity >65 dB 200 ps minimum pulse width 5 GHz equivalent input rise time bandwidth Typical output rise/fall of 165 ps APPLICATIONS High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers and signal restoration Threshold detection Peak detection High speed triggers Patient diagnostics Disk drive read channel detection Hand-held test instruments Zero-crossing detectors Clock drivers Automatic test equipment GENERAL DESCRIPTION
The ADCMP567 is an ultrafast voltage comparator fabricated A fast, high precision differential input stage permits consistent on Analog Devices, Inc., proprietary XFCB process. The device propagation delay with a wide variety of signals in the common- features 250 ps propagation delay with less than 35 ps overdrive mode range from −2.0 V to +3.0 V. Outputs are complementary dispersion. Overdrive dispersion, a particularly important digital signals fully compatible with PECL 10 K and 10 KH logic characteristic of high speed comparators, is a measure of the families. The outputs provide sufficient drive current to directly difference in propagation delay under differing overdrive drive transmission lines terminated in 50 Ω to VDD − 2 V. A latch conditions. input is included, which permits tracking, track-and-hold, or sample-and-hold modes of operation. The ADCMP567 is available in a 32-lead LFCSP package.
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2003–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TIMING INFORMATION APPLICATIONS INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE