Datasheet AD8561 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Ultrafast 7 ns Single Supply Comparator |
| Pages / Page | 12 / 4 — AD8561–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V+ = +3.0 V, V– = VGND … |
| Revision | D |
| File Format / Size | PDF / 679 Kb |
| Document Language | English |
AD8561–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V+ = +3.0 V, V– = VGND = 0 V, TA = +25. C unless otherwise noted)
Model Line for this Datasheet
Text Version of Document
AD8561–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V+ = +3.0 V, V– = VGND = 0 V, TA = +25
ⴗ
C unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS Offset Voltage VOS 7 mV Input Bias Current IB VCM = 0 V –6 –3.0 μA IB –40°C ≤ TA ≤ +85°C –7 –4 μA Input Common-Mode Voltage Range VCM 0 +1.5 V Common-Mode Rejection Ratio CMRR 0.1 V ≤ VCM ≤ 1.5 V 60 dB OUTPUT CHARACTERISTICS Output High Voltage VOH IOH = –3.2 mA, VIN > 250 mV 1.21 V Output Low Voltage VOL IOL = +3.2 mA, VIN > 250 mV 0.3 V POWER SUPPLY Power Supply Rejection Ratio PSRR +2.7 V ≤ VCC, VEE ≤ +6 V 40 dB Supply Currents VO = 0 V, RL = ∞ V+ Supply Current I+ 4.0 4.5 mA –40°C ≤ TA ≤ +85°C 5.5 mA Ground Supply Current IGND 1.6 2.5 mA –40°C ≤ TA ≤ +85°C 3.0 mA V– Supply Current I– 2.4 3.3 mA –40°C ≤ TA ≤ +85°C 3.8 mA DYNAMIC PERFORMANCE Propagation Delay tP 100 mV Step with 20 mV Overdrive2 8.5 9.8 ns NOTES 1Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for 3 V operation. 2Guaranteed by design. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS Package Type
2 JA
JC Units
Total Supply Voltage from V– to V+ . 14 V 8-Lead Plastic DIP (N) 103 43 °C/W Input Voltage1 . ±7 V 8-Lead SO (R) 158 43 °C/W Differential Input Voltage . ±8 V 8-Lead TSSOP 240 43 °C/W Output Short-Circuit Duration to GND . Indefinite NOTES 1 Storage Temperature Range The analog input voltage is equal to ±7 V or the analog supply voltage, whichever is less. N, R, RU Package . –65°C to +150°C 2θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for P-DIP and θ Operating Temperature Range . –40°C to +85°C JA is specified for device soldered in circuit board for SOIC and TSSOP packages. Junction Temperature Range N, R, RU Package . –65°C to +150°C Lead Temperature Range (Soldering, 10 sec) . 350°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
WARNING!
accumulate on the human body and test equipment and can discharge without detection. Although the AD8561 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality. –4– Rev. D Document Outline Features Applications General Description Pin Configurations Specifications Electrical Specifications Absolute Maximum Ratings Typical Performance Characteristics Applications Optimizing High Speed Performance Replacing the LT1016 Increasing Output Swing Output Loading Considerations Setup and Hold Times for Latching the Output Input Stage and Bias Currents Using Hysteresis SPICE Model Outline Dimensions Ordering Guide Revision History
ⴗ
C unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS Offset Voltage VOS 7 mV Input Bias Current IB VCM = 0 V –6 –3.0 μA IB –40°C ≤ TA ≤ +85°C –7 –4 μA Input Common-Mode Voltage Range VCM 0 +1.5 V Common-Mode Rejection Ratio CMRR 0.1 V ≤ VCM ≤ 1.5 V 60 dB OUTPUT CHARACTERISTICS Output High Voltage VOH IOH = –3.2 mA, VIN > 250 mV 1.21 V Output Low Voltage VOL IOL = +3.2 mA, VIN > 250 mV 0.3 V POWER SUPPLY Power Supply Rejection Ratio PSRR +2.7 V ≤ VCC, VEE ≤ +6 V 40 dB Supply Currents VO = 0 V, RL = ∞ V+ Supply Current I+ 4.0 4.5 mA –40°C ≤ TA ≤ +85°C 5.5 mA Ground Supply Current IGND 1.6 2.5 mA –40°C ≤ TA ≤ +85°C 3.0 mA V– Supply Current I– 2.4 3.3 mA –40°C ≤ TA ≤ +85°C 3.8 mA DYNAMIC PERFORMANCE Propagation Delay tP 100 mV Step with 20 mV Overdrive2 8.5 9.8 ns NOTES 1Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for 3 V operation. 2Guaranteed by design. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS Package Type
2 JA
JC Units
Total Supply Voltage from V– to V+ . 14 V 8-Lead Plastic DIP (N) 103 43 °C/W Input Voltage1 . ±7 V 8-Lead SO (R) 158 43 °C/W Differential Input Voltage . ±8 V 8-Lead TSSOP 240 43 °C/W Output Short-Circuit Duration to GND . Indefinite NOTES 1 Storage Temperature Range The analog input voltage is equal to ±7 V or the analog supply voltage, whichever is less. N, R, RU Package . –65°C to +150°C 2θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket for P-DIP and θ Operating Temperature Range . –40°C to +85°C JA is specified for device soldered in circuit board for SOIC and TSSOP packages. Junction Temperature Range N, R, RU Package . –65°C to +150°C Lead Temperature Range (Soldering, 10 sec) . 350°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
WARNING!
accumulate on the human body and test equipment and can discharge without detection. Although the AD8561 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality. –4– Rev. D Document Outline Features Applications General Description Pin Configurations Specifications Electrical Specifications Absolute Maximum Ratings Typical Performance Characteristics Applications Optimizing High Speed Performance Replacing the LT1016 Increasing Output Swing Output Loading Considerations Setup and Hold Times for Latching the Output Input Stage and Bias Currents Using Hysteresis SPICE Model Outline Dimensions Ordering Guide Revision History
