Datasheet ADP7159 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 2 A, Ultralow Noise, High PSRR, Adjustable Output, RF Linear Regulator |
| Pages / Page | 23 / 10 — ADP7159. Data Sheet. 10Hz. 100Hz. –10. 1kHz. 10kHz. –20. 100kHz. 1MHz. … |
| Revision | B |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
ADP7159. Data Sheet. 10Hz. 100Hz. –10. 1kHz. 10kHz. –20. 100kHz. 1MHz. –30. 10MHz. –40. –50. RR (. P –60. –70. –80. –90. –100. 0.50. 0.60. 0.70. 0.80. 0.90. 1.0. 1.1. 1.2. 1.3
Model Line for this Datasheet
Text Version of Document
ADP7159 Data Sheet 0 0 10Hz 10Hz 100Hz 100Hz –10 1kHz –10 1kHz 10kHz 10kHz –20 100kHz –20 100kHz 1MHz 1MHz –30 10MHz –30 10MHz –40 B) –40 B) d d –50 –50 RR ( RR ( S S P –60 P –60 –70 –70 –80 –80 –90 –90 –100 –100 0.50 0.60 0.70 0.80 0.90
023
1.0 1.1 1.2 1.3 1.4
026
HEADROOM (V)
12939-
HEADROOM (V)
12939- Figure 23. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage Figure 26. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage at Various Frequencies, VOUT = 3.3 V, 2 A Load at Various Frequencies, VOUT = 1.2 V, 2 A Load
0 0 ILOAD = 10mA 1µF 10µF –10 ILOAD = 100mA –10 ILOAD = 600mA 100µF ILOAD = 1200mA 1000µF –20 I –20 LOAD = 2000mA –30 –30 –40 –40 B) B) d d –50 –50 RR ( RR ( S S P –60 P –60 –70 –70 –80 –80 –90 –90 –100 –100 1 10 100 1k 10k 100k 1M 10M
024
1 10 100 1k 10k 100k 1M 10M
027
FREQUENCY (Hz)
12939-
FREQUENCY (Hz)
12939- Figure 24. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 27. Power Supply Rejection Ratio (PSRR) vs. Frequency at Various Loads, VOUT = 1.2 V, VIN = 2.4 V at Various CBYP Values, VOUT = 3.3 V, VIN = 4.0 V, 2 A Load
0 2.0 1.4V 1.3V –10 1.2V 1.8 1.1V –20 1.0V 1.6 10Hz TO 100kHz –30 1.4 rms) V –40 µ B) 1.2 ( d E –50 IS 1.0 100Hz TO 100kHz RR ( S NO P –60 0.8 UT P –70 UT 0.6 O –80 0.4 –90 0.2 –100 0 1 10 100 1k 10k 100k 1M 10M
025
10m 100m 1 10
028
FREQUENCY (Hz)
12939-
ILOAD (A)
12939- Figure 25. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 28. RMS Output Noise vs. Load Current (I at Various Headroom Voltages, V LOAD) OUT = 1.2 V, 2 A Load Rev. B | Page 10 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) PROGRAMMABLE PRECISION ENABLE START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL SHUTDOWN THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PSRR PERFORMANCE PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
023
1.0 1.1 1.2 1.3 1.4
026
HEADROOM (V)
12939-
HEADROOM (V)
12939- Figure 23. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage Figure 26. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage at Various Frequencies, VOUT = 3.3 V, 2 A Load at Various Frequencies, VOUT = 1.2 V, 2 A Load
0 0 ILOAD = 10mA 1µF 10µF –10 ILOAD = 100mA –10 ILOAD = 600mA 100µF ILOAD = 1200mA 1000µF –20 I –20 LOAD = 2000mA –30 –30 –40 –40 B) B) d d –50 –50 RR ( RR ( S S P –60 P –60 –70 –70 –80 –80 –90 –90 –100 –100 1 10 100 1k 10k 100k 1M 10M
024
1 10 100 1k 10k 100k 1M 10M
027
FREQUENCY (Hz)
12939-
FREQUENCY (Hz)
12939- Figure 24. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 27. Power Supply Rejection Ratio (PSRR) vs. Frequency at Various Loads, VOUT = 1.2 V, VIN = 2.4 V at Various CBYP Values, VOUT = 3.3 V, VIN = 4.0 V, 2 A Load
0 2.0 1.4V 1.3V –10 1.2V 1.8 1.1V –20 1.0V 1.6 10Hz TO 100kHz –30 1.4 rms) V –40 µ B) 1.2 ( d E –50 IS 1.0 100Hz TO 100kHz RR ( S NO P –60 0.8 UT P –70 UT 0.6 O –80 0.4 –90 0.2 –100 0 1 10 100 1k 10k 100k 1M 10M
025
10m 100m 1 10
028
FREQUENCY (Hz)
12939-
ILOAD (A)
12939- Figure 25. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 28. RMS Output Noise vs. Load Current (I at Various Headroom Voltages, V LOAD) OUT = 1.2 V, 2 A Load Rev. B | Page 10 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) PROGRAMMABLE PRECISION ENABLE START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL SHUTDOWN THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PSRR PERFORMANCE PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
