Datasheet HMC976LP3E (Analog Devices) - 2

ManufacturerAnalog Devices
Description400 mA Low Noise, High PSRR Linear Voltage Regulator
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HMC976LP3E. 400mA LOW NOISE, HIGH PSRR. LINEAR VOLTAGE REGULATOR. Table 1. Electrical Specifications

HMC976LP3E 400mA LOW NOISE, HIGH PSRR LINEAR VOLTAGE REGULATOR Table 1 Electrical Specifications

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HMC976LP3E
v02.1112
400mA LOW NOISE, HIGH PSRR LINEAR VOLTAGE REGULATOR Table 1. Electrical Specifications
(Continued) Parameter Conditions Min Typ Max Units Vdd = 5.5V; REF cannot source/sink Reference Voltage VREF 1.17 V external current Output Current VR [1] TA = -40°C to +85°C 400 mA Output Noise Spectral Density 4000 10 Hz Vdd = 5.5V; VR = 5.0V 120 100 Hz 6 nV/rtHz 1 kHz Measured on Application Schematic [3] 3 10 kHz Maximum Load Current 3 100 kHz Integrated Output Noise 100 Hz to 100 kHz Vdd = 5.5V; VR = 5.0V [3] 1.5 µVrms Load Regulation, VR Vdd = 5.5V; VR=5.0V 0.01 % / mA PSRR 1 kHz -70 10 kHz -65 Vdd = 5.5V; VR=5.0V 100 kHz -45 dB Maximum load current 1 MHz -35 10 MHz -30 50 MHz -20 Output Voltage Variation vs. Package Base Temperature Vdd = 5.5V; VR=5.0V 25°C to 85°C Maximum load current 0.005 0.01 % / °C -40°C to 25°C 0.005 0.01 % / °C Ven = Vdd = 5.5V; Current Consumption (IGND) 1.1 1.5 mA Maximum Load Current T Vdd = 5.5V; EN = Low; Output is float- Power Down Current ing (high - impedance) in Power-Down 1 µA M mode 0 to 90% of final voltage Start-Up Transient Time 200 ms Vdd = 5.5V[3] G - S Enable Input EN High Level Vdd>=VEN 2 Vdd V IN Enable Input EN Low Level Vdd>=VEN 0 0.8 V N To guarantee stability, noise and PSRR Output Load Capacitance [2] performance [3] 4.7 µF IO IT Thermal Protection Threshold Junction Junction Temperature Rising 115 130 °C Temperature [4] D Thermal Protection Hysteresis 10 °C N O R C E W O P [1] The regulator does not include short-circuit protection circuitry. The outputs will withstand short-circuit conditions for a duration <10s. The thermal protection is not intended to be used as a short circuit protection [2] HMC976LP3E was designed to work with low ESR ceramic capacitors connected to pin 4 VRX. [3] See HMC976LP3E 5.0V User Application Schematic herein [4] See figures 14,15, and 16 InfoFro ma r p tion rfiucre nis, d he e d lbiv y e An raly a og n Ded t viceo p s is la be clie o eved rtd o e b re sa: H ccur iattti e te M and re ilicarbloew . a Ho ve C wever, onro For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other poration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 978-250-3343 tel • 978-250-3373 fax • O rights of third parties that may result from its use. Specifications subject to change without notice. No rd P e h r O one n : 7-lin 81- e a 329-t w 47 w 0 w.h 0 • O it rd teite r o .nc li o n m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. e at www.analog.com 2 Application S Trademarks and registered trademarks are the property of their respective owners. upport: apps@ A h p i p tliti c te ati .ocom n Support: Phone: 1-800-ANALOG-D