Datasheet ADP124, ADP125 (Analog Devices) - 5

ManufacturerAnalog Devices
Description5.5 V Input, 500 mA, Low Quiescent Current, CMOS Linear Regulators
Pages / Page20 / 5 — Data Sheet. ADP124/ADP125. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter. …
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File Format / SizePDF / 1.2 Mb
Document LanguageEnglish

Data Sheet. ADP124/ADP125. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter. Rating. THERMAL DATA. THERMAL RESISTANCE

Data Sheet ADP124/ADP125 ABSOLUTE MAXIMUM RATINGS Table 3 Parameter Rating THERMAL DATA THERMAL RESISTANCE

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Data Sheet ADP124/ADP125 ABSOLUTE MAXIMUM RATINGS Table 3.
application and board layout. In applications in which high maxi-
Parameter Rating
mum power dissipation exists, close attention to thermal board design is required. The value of θ VIN to GND −0.3 V to +6.5 V JA may vary, depending on PCB material, layout, and environmental conditions. The specified ADJ to GND −0.3 V to +6.5 V values of θ EN to GND −0.3 V to +6.5 V JA are based on a 4-layer, 4 inch × 3 inch circuit board. Refer to JESD 51-7 for detailed information on the board VOUT to GND −0.3 V to VIN construction. Storage Temperature Range −65°C to +150°C Operating Ambient Temperature Range −40°C to +85°C ΨJB is the junction-to-board thermal characterization parameter Operating Junction Temperature Range −40°C to +125°C and is measured in °C/W. The ΨJB of the package is based on Soldering Conditions JEDEC J-STD-020 modeling and calculation using a 4-layer board. The Guidelines for Reporting and Using Package Thermal Information: JESD51-12 Stresses above those listed under Absolute Maximum Ratings states that thermal characterization parameters are not the same may cause permanent damage to the device. This is a stress as thermal resistances. ΨJB measures the component power flowing rating only; functional operation of the device at these or any through multiple thermal paths rather than a single path as in other conditions above those indicated in the operational thermal resistance, θJB. Therefore, ΨJB thermal paths include section of this specification is not implied. Exposure to absolute convection from the top of the package as wel as radiation from maximum rating conditions for extended periods may affect the package—factors that make ΨJB more useful in real-world device reliability. applications. Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD)
THERMAL DATA
using the formula Absolute maximum ratings apply individually only, not in TJ = TB + (PD × ΨJB) combination. The ADP124/ADP125 can be damaged when the junction temperature limits are exceeded. Monitoring ambient Refer to JESD51-8 and JESD51-12 for more detailed information temperature does not guarantee that T about ΨJB. J will remain within the specified temperature limits. In applications with high power
THERMAL RESISTANCE
dissipation and poor thermal resistance, the maximum ambient θJA and ΨJB are specified for the worst-case conditions, that is, a temperature may have to be limited. device soldered in a circuit board for surface-mount packages. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can
Table 4. Thermal Resistance
exceed the maximum limit as long as the junction temperature
Package Type θJA ΨJB Unit
is within specification limits. The junction temperature (T 8-Lead MSOP 102.8 31.8 °C/W J) of the device is dependent on the ambient temperature (T 8-Lead LFCSP 68.9 44.1 °C/W A), the power dissipation of the device (P D), and the junction-to-ambient thermal resistance of the package (θJA).
ESD CAUTION
Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula TJ = TA + (PD × θJA) The junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the Rev. D | Page 5 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED CAPACITOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS JUNCTION TEMPERATURE CALCULATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE