Datasheet EFM8LB1 (Silicon Labs) - 3

ManufacturerSilicon Labs
DescriptionEFM8 Laser Bee Family
Pages / Page77 / 3 — 2. Ordering Information. EFM8 LB1 2 F 64 E S1 – A – QFN32 R. Tape and …
File Format / SizePDF / 1.2 Mb
Document LanguageEnglish

2. Ordering Information. EFM8 LB1 2 F 64 E S1 – A – QFN32 R. Tape and Reel (Optional). Package Type. Revision

2 Ordering Information EFM8 LB1 2 F 64 E S1 – A – QFN32 R Tape and Reel (Optional) Package Type Revision

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link to page 5 link to page 5 EFM8LB1 Data Sheet Ordering Information
2. Ordering Information EFM8 LB1 2 F 64 E S1 – A – QFN32 R Tape and Reel (Optional) Package Type Revision SMBus Bootloader (S) and Bootloader Revision (0 or 1) (Optional) Temperature Grade E (-40 to +105) Flash Memory Size – 64 KB Memory Type (Flash) Family Feature Set Laser Bee 1 Family Silicon Labs EFM8 Product Line Figure 2.1. EFM8LB1 Part Numbering
All EFM8LB1 family members have the following features: • CIP-51 Core running up to 72 MHz • Three Internal Oscillators (72 MHz, 24.5 MHz and 80 kHz) • SMBus • I2C Slave • SPI • 2 UARTs • 6-Channel Programmable Counter Array (PWM, Clock Generation, Capture/Compare) • Six 16-bit Timers • Four Configurable Logic Units • 14-bit Analog-to-Digital Converter with integrated multiplexer, voltage reference, temperature sensor, channel sequencer, and direct- to-XRAM data transfer • Two Analog Comparators • 16-bit CRC Unit • Temperature range: -40 to +105 °C In addition to these features, each part number in the EFM8LB1 family has a set of features that vary across the product line. The product selection guide shows the features available on each family member.
Table 2.1. Product Selection Guide Ordering Part Number Flash Memory (kB) RAM (Bytes) Digital Port I/Os (Total) ADC0 Channels Voltage DACs Comparator 0 Inputs Comparator 1 Inputs Bootloader Type Bootloader Pins Pb-free (RoHS Compliant) Package
EFM8LB12F64E-C-QFN32 64 4352 29 20 4 10 9 UART P0.4 / P0.52 Yes QFN32 EFM8LB12F64E-C-QFP32 64 4352 28 20 4 10 9 UART P0.4 / P0.52 Yes QFP32
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| Building a more connected world. Rev. 1.3 | 3 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 External Clock Input 4.1.8 External Oscillator 4.1.9 ADC 4.1.10 Voltage Reference 4.1.11 Temperature Sensor 4.1.12 1.8 V Internal LDO Voltage Regulator 4.1.13 DACs 4.1.14 Comparators 4.1.15 Configurable Logic 4.1.16 Port I/O 4.1.17 SMBus 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8LB1x-QFN32 Pin Definitions 6.2 EFM8LB1x-QFP32 Pin Definitions 6.3 EFM8LB1x-QFN24 Pin Definitions 6.4 EFM8LB1x-QSOP24 Pin Definitions 7. QFN32 Package Specifications 7.1 Package Dimensions 7.2 PCB Land Pattern 7.3 Package Marking 8. QFP32 Package Specifications 8.1 Package Dimensions 8.2 PCB Land Pattern 8.3 Package Marking 9. QFN24 Package Specifications 9.1 Package Dimensions 9.2 PCB Land Pattern 9.3 Package Marking 10. QSOP24 Package Specifications 10.1 Package Dimensions 10.2 PCB Land Pattern 10.3 Package Marking 11. Revision History