link to page 7 link to page 7 link to page 22 AD8426Test Conditions/A GradeB GradeParameterCommentsMinTypMaxMinTypMaxUnit REFERENCE INPUT RIN 100 100 kΩ IIN 7 7 μA Voltage Range −VS +VS −VS +VS V Reference Gain to Output 1 1 V/V Reference Gain Error 0.01 0.01 % GAIN G = 1 + (49.4 kΩ/RG) Gain Range 1 1000 1 1000 V/V Gain Error G = 1 VOUT = 0.8 V to 1.8 V 0.05 0.05 % G = 5 to 1000 VOUT = 0.2 V to 2.5 V 0.3 0.1 % Gain vs. Temperature2 G = 1 TA = −40°C to +85°C 5 1 ppm/°C TA = +85°C to +125°C 5 2 ppm/°C G > 1 TA = −40°C to +125°C −100 −100 ppm/°C INPUT −VS = 0 V, +VS = 2.7 V to 36 V Input Impedance Differential 0.8||2 0.8||2 GΩ||pF Common Mode 0.4||2 0.4||2 GΩ||pF Input Operating Voltage TA = +25°C −0.1 +VS − 0.7 −0.1 +VS − 0.7 V Range3 TA = +125°C −0.05 +VS − 0.6 −0.05 +VS − 0.6 V TA = −40°C −0.15 +VS − 0.9 −0.15 +VS − 0.9 V Input Overvoltage Range TA = −40°C to +125°C +VS − 40 −VS + 40 +VS − 40 −VS + 40 V OUTPUT Output Swing RL = 10 kΩ to 1.35 V TA = −40°C to +125°C 0.1 +VS − 0.1 0.1 +VS − 0.1 V Short-Circuit Current 13 13 mA POWER SUPPLY Operating Range Single-supply operation 2.2 36 2.2 36 V Quiescent Current −VS = 0 V, +VS = 2.7 V (Per Amplifier) TA = +25°C 325 400 325 400 μA TA = −40°C 250 325 250 325 μA TA = +85°C 425 500 425 500 μA TA = +125°C 475 550 475 550 μA TEMPERATURE RANGE −40 +125 −40 +125 °C 1 The input stage uses PNP transistors; therefore, input bias current always flows into the part. 2 The values specified for G > 1 do not include the effects of the external gain-setting resistor, RG. 3 Input voltage range of the AD8426 input stage. The input range depends on the common-mode voltage, the differential voltage, the gain, and the reference voltage. See the Input Voltage Range section for more information. Rev. 0 | Page 7 of 28 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION Dynamic Performance Specifications SINGLE-SUPPLY OPERATION Dynamic Performance Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Package Considerations Hidden Paddle Package Common-Mode Rejection Ratio over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION PRECISION STRAIN GAGE DIFFERENTIAL DRIVE Differential Output Using Both AD8426 Amplifiers 2-Channel Differential Output Using a Dual Op Amp Tips for Best Differential Output Performance DRIVING A CABLE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE