Datasheet AD8010 (Analog Devices) - 8

AD8010 Driving Capacitance Loads G = +6 R
The AD8010 was designed primarily to drive nonreactive loads.
F = 604 RL = 18.75
If driving loads with a capacitive component is desired, best frequency response is obtained by the addition of a small series
INPUT OUTPUT
resistance as shown in Figure 28. The inset figure shows the optimum value for RSERIES vs. capacitive load. It is worth noting
0
that the frequency response of the circuit when driving large
VOLTS
capacitive loads will be dominated by the passive roll-off of RSERIES and CL.
INPUT (500mV/DIV) LAYOUT CONSIDERATIONS OUTPUT (1V/DIV) 100ns
The specified high speed performance of the AD8010 requires careful attention to board layout and component selection. Figure 27. Overdrive Recovery; G = +6 Proper RF design techniques and low-pass parasitic component selection are necessary.
OVERDRIVE RECOVERY
Overdrive of an amplifier occurs when the output and/or input The PCB should have a ground plane covering all unused portions range are exceeded. The amplifier must recover from this over- of the component side of the board to provide low impedance drive condition. As shown in Figure 27, the AD8010 recovers path. The ground plane should be removed from the area near within 35 ns from negative overdrive and within 75 ns from the input pins to reduce the parasitic capacitance. positive overdrive.
+VS –VS THEORY OF OPERATION
The AD8010 is a current feedback amplifier optimized for high current output while maintaining excellent performance with
FB
respect to flatness, distortion and differential gain/phase. As a
C1
video distribution amplifier, the AD8010 will drive up to 12
+
parallel video loads (12.5 Ω) from a single output with 0.04%
150 VIN
differential gain and 0.04° differential phase errors. This means
R Z BT O
that, unlike designs with one driver per output, any output is a
R AD8010 T
true reflection of the signal on all other outputs.
C2 RL R + F
The high output current capability of the AD8010 also make it useful in xDSL applications. The AD8010 can drive a 12.5 Ω single-ended or 25 Ω differential load with low harmonic dis- tortion. This makes it useful in designs that utilize a step-up
RG
transformer to drive a twisted-pair transmission line. To achieve these levels of performance special precautions with respect to supply bypassing are recommended (Figure 29). This Figure 29. Standard Noninverting Closed-Loop Configura- configuration minimizes the contribution from high frequency tion with Recommended Bypassing Technique supply rejection to differential gain and phase errors as well as The standard noninverting closed-loop configuration with the reducing distortion due to harmonic energy in the power supplies. recommended power supply bypassing technique is shown in Figure 29. Ferrite beads (Amidon Associates, Torrance CA,
200
Part Number 43101) are used to suppress high frequency power
GAIN AS SHOWN 100 VO = 0.2V p-p
supply energy on the DUT supply lines at the DUT. C1 and C2
w/ 30% OVERSHOOT G = +5
each represent the parallel combination of a 47 µF (16 V) tanta-
pF
lum electrolytic capacitor, a 10 µF (10 V) tantalum electrolytic
– RF R
capacitor and a 0.1 µF ceramic chip capacitor. Connect C1
G RS
from the +V
150 V
S pin to the –VS pin. Connect C2 from the –VS pin
OUT
to signal ground.
V C IN L 10 50
The feedback resistor should be located close to the inverting
CAPACITIVE LOAD
input pin in order to keep the parasitic capacitance at this node to a minimum. Parasitic capacitances of less than 1 pF at the
G = +2
inverting input can significantly affect high speed performance.
G = +1
Stripline design techniques should be used for long traces
10 5 10 15 20
(greater than about 3 cm). These should be designed with a
RS –
characteristic impedance (ZO) of 50 Ω or 75 Ω and be properly Figure 28. Capacitive Load Drive vs. Series Resistor for terminated at each end. Various Gains –8– REV. B