Datasheet ADP1870, ADP1871 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Synchronous Buck Controller with Constant On-Time and Valley Current Mode |
| Pages / Page | 44 / 3 — Data Sheet. ADP1870/ADP1871. SPECIFICATIONS. Table 1. Parameter. Symbol. … |
| Revision | B |
| File Format / Size | PDF / 1.8 Mb |
| Document Language | English |
Data Sheet. ADP1870/ADP1871. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. Min. Typ. Max. Unit
Model Line for this Datasheet
Text Version of Document
link to page 13 link to page 13 link to page 12 link to page 16 link to page 4
Data Sheet ADP1870/ADP1871 SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). VREG = 5 V, VBST − VSW = VREG − VRECT_DROP (see Figure 40 to Figure 42). VIN = 12 V. The specifications are valid for TJ = −40°C to +125°C, unless otherwise specified.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY CHARACTERISTICS High Input Voltage Range VIN CIN = 22 µF to PGND (at Pin 1) ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz) 2.95 12 20 V ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz) 2.95 12 20 V ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz) 3.25 12 20 V Quiescent Current IQ_REG + IQ_BST VFB = 1.5 V, no switching 1.1 mA Shutdown Current IREG,SD + COMP/EN < 285 mV 190 280 μA IBST,SD Undervoltage Lockout UVLO Rising VIN (see Figure 35 for temperature variation) 2.65 V UVLO Hysteresis Falling VIN from operational state 190 mV INTERNAL REGULATOR VREG should not be loaded externally because it is CHARACTERISTICS intended to only bias internal circuitry. VREG Operational Output Voltage VREG CVREG = 1 µF to PGND, 0.22 µF to GND, VIN = 2.95 V to 20 V ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz) 2.75 5 5.5 V ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz) 2.75 5 5.5 V ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz) 3.05 5 5.5 V VREG Output in Regulation VIN = 7 V, 100 mA 4.8 4.981 5.16 V VIN = 12 V, 100 mA 4.8 4.982 5.16 V Load Regulation 0 mA to 100 mA, VIN = 7 V 32 mV 0 mA to 100 mA, VIN = 20 V 33 mV Line Regulation VIN = 7 V to 20 V, 20 mA 2.5 mV VIN = 7 V to 20 V, 100 mA 2.0 mV VIN to VREG Dropout Voltage 100 mA out of VREG, VIN ≤ 5 V 300 415 mV Short VREG to PGND VIN = 20 V 229 320 mA SOFT START Soft Start Period See Figure 58 3.0 ms ERROR AMPLIFER FB Regulation Voltage VFB TJ = +25°C 600 mV TJ = −40°C to +85°C 596 600 604 mV TJ = −40°C to +125°C 594.2 600 605.8 mV Transconductance Gm 320 496 670 µS FB Input Leakage Current IFB, Leak VFB = 0.6 V, COMP/EN = released 1 50 nA CURRENT-SENSE AMPLIFIER GAIN Programming Resistor (RES) RES = 47 kΩ ± 1% 2.7 3 3.3 V/V Value from DRVL to PGND RES = 22 kΩ ± 1% 5.5 6 6.5 V/V RES = none 11 12 13 V/V RES = 100 kΩ ± 1% 22 24 26 V/V SWITCHING FREQUENCY Typical values measured at 50% time points with 0 nF at DRVH and DRVL; maximum values are guaranteed by bench evaluation1 ADP1870ARMZ-0.3/ 300 kHz ADP1871ARMZ-0.3 (300 kHz) On-Time VIN = 5 V, VOUT = 2 V, TJ = 25°C 1120 1200 1280 ns Minimum On-Time VIN = 20 V 146 190 ns Minimum Off-Time 84% duty cycle (maximum) 340 400 ns Rev. B | Page 3 of 44 Document Outline Features Applications General Description Typical Applications Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1870/ADP1871 Block Diagram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier Power Saving Mode (PSM) Version (ADP1871) Timer Operation Pseudo-Fixed Frequency Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Considerations Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Applications Circuits 15 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide
Data Sheet ADP1870/ADP1871 SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). VREG = 5 V, VBST − VSW = VREG − VRECT_DROP (see Figure 40 to Figure 42). VIN = 12 V. The specifications are valid for TJ = −40°C to +125°C, unless otherwise specified.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY CHARACTERISTICS High Input Voltage Range VIN CIN = 22 µF to PGND (at Pin 1) ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz) 2.95 12 20 V ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz) 2.95 12 20 V ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz) 3.25 12 20 V Quiescent Current IQ_REG + IQ_BST VFB = 1.5 V, no switching 1.1 mA Shutdown Current IREG,SD + COMP/EN < 285 mV 190 280 μA IBST,SD Undervoltage Lockout UVLO Rising VIN (see Figure 35 for temperature variation) 2.65 V UVLO Hysteresis Falling VIN from operational state 190 mV INTERNAL REGULATOR VREG should not be loaded externally because it is CHARACTERISTICS intended to only bias internal circuitry. VREG Operational Output Voltage VREG CVREG = 1 µF to PGND, 0.22 µF to GND, VIN = 2.95 V to 20 V ADP1870ARMZ-0.3/ADP1871ARMZ-0.3 (300 kHz) 2.75 5 5.5 V ADP1870ARMZ-0.6/ADP1871ARMZ-0.6 (600 kHz) 2.75 5 5.5 V ADP1870ARMZ-1.0/ADP1871ARMZ-1.0 (1.0 MHz) 3.05 5 5.5 V VREG Output in Regulation VIN = 7 V, 100 mA 4.8 4.981 5.16 V VIN = 12 V, 100 mA 4.8 4.982 5.16 V Load Regulation 0 mA to 100 mA, VIN = 7 V 32 mV 0 mA to 100 mA, VIN = 20 V 33 mV Line Regulation VIN = 7 V to 20 V, 20 mA 2.5 mV VIN = 7 V to 20 V, 100 mA 2.0 mV VIN to VREG Dropout Voltage 100 mA out of VREG, VIN ≤ 5 V 300 415 mV Short VREG to PGND VIN = 20 V 229 320 mA SOFT START Soft Start Period See Figure 58 3.0 ms ERROR AMPLIFER FB Regulation Voltage VFB TJ = +25°C 600 mV TJ = −40°C to +85°C 596 600 604 mV TJ = −40°C to +125°C 594.2 600 605.8 mV Transconductance Gm 320 496 670 µS FB Input Leakage Current IFB, Leak VFB = 0.6 V, COMP/EN = released 1 50 nA CURRENT-SENSE AMPLIFIER GAIN Programming Resistor (RES) RES = 47 kΩ ± 1% 2.7 3 3.3 V/V Value from DRVL to PGND RES = 22 kΩ ± 1% 5.5 6 6.5 V/V RES = none 11 12 13 V/V RES = 100 kΩ ± 1% 22 24 26 V/V SWITCHING FREQUENCY Typical values measured at 50% time points with 0 nF at DRVH and DRVL; maximum values are guaranteed by bench evaluation1 ADP1870ARMZ-0.3/ 300 kHz ADP1871ARMZ-0.3 (300 kHz) On-Time VIN = 5 V, VOUT = 2 V, TJ = 25°C 1120 1200 1280 ns Minimum On-Time VIN = 20 V 146 190 ns Minimum Off-Time 84% duty cycle (maximum) 340 400 ns Rev. B | Page 3 of 44 Document Outline Features Applications General Description Typical Applications Circuit Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1870/ADP1871 Block Diagram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier Power Saving Mode (PSM) Version (ADP1871) Timer Operation Pseudo-Fixed Frequency Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Considerations Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Applications Circuits 15 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide
