Datasheet ADP1821 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Step-Down DC-to-DC Controller |
| Pages / Page | 24 / 5 — ADP1821. ABSOLUTE MAXIMUM RATINGS. Table 2. Parameter Rating. ESD … |
| Revision | C |
| File Format / Size | PDF / 828 Kb |
| Document Language | English |
ADP1821. ABSOLUTE MAXIMUM RATINGS. Table 2. Parameter Rating. ESD CAUTION. SIMPLIFIED BLOCK DIAGRAM. SHDN. VCC. UVLO. LOGIC. FAULT. THERMAL
Model Line for this Datasheet
Text Version of Document
ADP1821 ABSOLUTE MAXIMUM RATINGS Table 2.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
Parameter Rating
rating only; functional operation of the device at these or any VCC, SHDN, SYNC, FREQ, COMP, SS, FB to −0.3 V to +6 V other conditions above those indicated in the operational GND, PVCC to PGND, BST to SW section of this specification is not implied. Exposure to absolute BST to GND −0.3 V to +30 V maximum rating conditions for extended periods may affect CSL to GND −1 V to +30 V device reliability. DH to GND (VSW − 0.3 V) to (VBST + 0.3 V) Absolute maximum ratings apply individually only, not in DL to PGND −0.3 V to combination. Unless otherwise specified, all other voltages (VPVCC + 0.3 V) are referenced to GND. SW to GND −2 V to +30 V PGND to GND ±2 V θJA, 2-Layer (SEMI Standard Board) 150°C/W
ESD CAUTION
θJA, 4-Layer (JEDEC Standard Board) 105°C/W Operating Ambient Temperature Range −40°C to +85°C Operating Junction Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Maximum Soldering Lead Temperature 260°C
SIMPLIFIED BLOCK DIAGRAM SHDN ADP1821 VCC UVLO LOGIC FAULT THERMAL BST GND SHUTDOWN DH FREQ S Q SW OSCILLATOR SYNC PWM PVCC COMP R Q DL PGND VCC CSL FB 0.6V OV 100kΩ REFERENCE SS 0.8V UV PWGD 2.5kΩ FAULT UVLO
3
THSD
-00 310 05 Figure 3. Simplified Block Diagram Rev. C | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS INPUT VOLTAGE RANGE SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SETTING THE SOFT START PERIOD PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
Parameter Rating
rating only; functional operation of the device at these or any VCC, SHDN, SYNC, FREQ, COMP, SS, FB to −0.3 V to +6 V other conditions above those indicated in the operational GND, PVCC to PGND, BST to SW section of this specification is not implied. Exposure to absolute BST to GND −0.3 V to +30 V maximum rating conditions for extended periods may affect CSL to GND −1 V to +30 V device reliability. DH to GND (VSW − 0.3 V) to (VBST + 0.3 V) Absolute maximum ratings apply individually only, not in DL to PGND −0.3 V to combination. Unless otherwise specified, all other voltages (VPVCC + 0.3 V) are referenced to GND. SW to GND −2 V to +30 V PGND to GND ±2 V θJA, 2-Layer (SEMI Standard Board) 150°C/W
ESD CAUTION
θJA, 4-Layer (JEDEC Standard Board) 105°C/W Operating Ambient Temperature Range −40°C to +85°C Operating Junction Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Maximum Soldering Lead Temperature 260°C
SIMPLIFIED BLOCK DIAGRAM SHDN ADP1821 VCC UVLO LOGIC FAULT THERMAL BST GND SHUTDOWN DH FREQ S Q SW OSCILLATOR SYNC PWM PVCC COMP R Q DL PGND VCC CSL FB 0.6V OV 100kΩ REFERENCE SS 0.8V UV PWGD 2.5kΩ FAULT UVLO
3
THSD
-00 310 05 Figure 3. Simplified Block Diagram Rev. C | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS INPUT VOLTAGE RANGE SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SETTING THE SOFT START PERIOD PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
