Datasheet BUK9V13-40H (Nexperia) - 6
| Manufacturer | Nexperia |
| Description | Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration) |
| Pages / Page | 13 / 6 — Nexperia. BUK9V13-40H. Dual N-channel 40 V, 13 mOhm logic level MOSFET in … |
| Revision | 11022021 |
| File Format / Size | PDF / 313 Kb |
| Document Language | English |
Nexperia. BUK9V13-40H. Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration). Symbol
Model Line for this Datasheet
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Nexperia BUK9V13-40H Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration) Symbol Parameter Conditions Min Typ Max Unit
RDSon drain-source on-state VGS = 10 V; ID = 10 A; Tj = 25 °C; 7.9 11.35 13.6 mΩ resistance Fig. 11 VGS = 10 V; ID = 10 A; Tj = 105 °C; 10.9 16.87 20.4 mΩ Fig. 12 VGS = 10 V; ID = 10 A; Tj = 125 °C; 12 18.2 21.9 mΩ Fig. 12 VGS = 10 V; ID = 10 A; Tj = 175 °C; 14.5 21.97 26.4 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 25 °C; 9.8 14.04 16.9 mΩ Fig. 11 VGS = 4.5 V; ID = 10 A; Tj = 105 °C; 13.5 20.6 25.4 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 125 °C; 14.8 22.24 27.2 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 175 °C; 18 26.65 32.8 mΩ Fig. 12 RG gate resistance f = 1 MHz; Tj = 25 °C 0.7 1.7 4.2 Ω
Dynamic characteristics FET1 and FET2
QG(tot) total gate charge ID = 10 A; VDS = 32 V; VGS = 10 V; - 13.9 19.4 nC Tj = 25 °C; Fig. 13; Fig. 14 ID = 10 A; VDS = 32 V; VGS = 5 V; - 7.3 10.2 nC Q T GS gate-source charge j = 25 °C; Fig. 13; Fig. 14 - 2.5 3.8 nC QGD gate-drain charge - 2.1 4.2 nC Ciss input capacitance VDS = 25 V; VGS = 0 V; f = 1 MHz; - 829 1160 pF C T oss output capacitance j = 25 °C; Fig. 15 - 280 420 pF Crss reverse transfer - 38 84 pF capacitance td(on) turn-on delay time VDS = 30 V; RL = 3 Ω; VGS = 5 V; - 5.6 - ns t R r rise time G(ext) = 5 Ω; Tj = 25 °C - 8.1 - ns td(of ) turn-of delay time - 9.1 - ns tf fall time - 6.5 - ns
Source-drain diode FET1 and FET2
VSD source-drain voltage IS = 10 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.84 1 V trr reverse recovery time IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V; - 21.5 - ns Q V r recovered charge DS = 20 V; Tj = 25 °C [1] - 16.2 - nC [1] includes capacitive recovery BUK9V13-40H All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. Al rights reserved
Product data sheet 11 February 2021 6 / 13
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Quick reference data 5. Pinning information 6. Ordering information 7. Marking 8. Limiting values 9. Thermal characteristics 10. Characteristics 11. Package outline 12. Soldering 13. Legal information Contents
Nexperia BUK9V13-40H Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration) Symbol Parameter Conditions Min Typ Max Unit
RDSon drain-source on-state VGS = 10 V; ID = 10 A; Tj = 25 °C; 7.9 11.35 13.6 mΩ resistance Fig. 11 VGS = 10 V; ID = 10 A; Tj = 105 °C; 10.9 16.87 20.4 mΩ Fig. 12 VGS = 10 V; ID = 10 A; Tj = 125 °C; 12 18.2 21.9 mΩ Fig. 12 VGS = 10 V; ID = 10 A; Tj = 175 °C; 14.5 21.97 26.4 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 25 °C; 9.8 14.04 16.9 mΩ Fig. 11 VGS = 4.5 V; ID = 10 A; Tj = 105 °C; 13.5 20.6 25.4 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 125 °C; 14.8 22.24 27.2 mΩ Fig. 12 VGS = 4.5 V; ID = 10 A; Tj = 175 °C; 18 26.65 32.8 mΩ Fig. 12 RG gate resistance f = 1 MHz; Tj = 25 °C 0.7 1.7 4.2 Ω
Dynamic characteristics FET1 and FET2
QG(tot) total gate charge ID = 10 A; VDS = 32 V; VGS = 10 V; - 13.9 19.4 nC Tj = 25 °C; Fig. 13; Fig. 14 ID = 10 A; VDS = 32 V; VGS = 5 V; - 7.3 10.2 nC Q T GS gate-source charge j = 25 °C; Fig. 13; Fig. 14 - 2.5 3.8 nC QGD gate-drain charge - 2.1 4.2 nC Ciss input capacitance VDS = 25 V; VGS = 0 V; f = 1 MHz; - 829 1160 pF C T oss output capacitance j = 25 °C; Fig. 15 - 280 420 pF Crss reverse transfer - 38 84 pF capacitance td(on) turn-on delay time VDS = 30 V; RL = 3 Ω; VGS = 5 V; - 5.6 - ns t R r rise time G(ext) = 5 Ω; Tj = 25 °C - 8.1 - ns td(of ) turn-of delay time - 9.1 - ns tf fall time - 6.5 - ns
Source-drain diode FET1 and FET2
VSD source-drain voltage IS = 10 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.84 1 V trr reverse recovery time IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V; - 21.5 - ns Q V r recovered charge DS = 20 V; Tj = 25 °C [1] - 16.2 - nC [1] includes capacitive recovery BUK9V13-40H All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. Al rights reserved
Product data sheet 11 February 2021 6 / 13
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Quick reference data 5. Pinning information 6. Ordering information 7. Marking 8. Limiting values 9. Thermal characteristics 10. Characteristics 11. Package outline 12. Soldering 13. Legal information Contents
