Datasheet AD712 (Analog Devices) - 7

Data Sheet AD712 100 100 100 MAX J GRADE LIMIT 80 80 A) 75 p ) ( B 60 60 rees) NT (d V eg S = 15V IN D ( RRE 25°C GA IN 50 40 40 CU RG OOP GAIN A AS -L PHASE M BI N E E 20 2kΩ 20 UT P OP 100pF HAS IN 25 P LOAD 0 0 0 –20 –20 –10 –5 0 5 10
08 0
10 100 1k 10k 100k 1M 10M
11 0 3- 3-
COMMON MODE VOLTAGE (V)
82
FREQUENCY (Hz)
00 082 0 Figure 8. Input Bias Current vs. Common-Mode Voltage Figure 11. Open-Loop Gain and Phase Margin vs. Frequency
26 125 A) 24 m 120 ( + OUTPUT CURRENT IT 22 ) IM B L (d 115 NT 20 IN A RL = 2kΩ 25°C URRE 18 P G 110 C O T O – OUTPUT CURRENT -L 16 RCUI PEN 105 -CI O 14 RT HO 100 S 12 10 95 –60 –40 –20 0 20 40 60 80 100 120 140
09 12 0
0 5 10 15 20
0 3- 3-
AMBIENT TEMPERATURE (°C)
82
SUPPLY VOLTAGE ± V
82 00 00 Figure 9. Short-Circuit Current Limit vs. Temperature Figure 12. Open-Loop Gain vs. Supply Voltage
5.0 110 100 B) d z) H N ( + SUPPLY M 4.5 IO T 80 H ( C JE IDT E W R Y 60 4.0 L P P – SUPPLY N BAND U AI R S 40 -G E Y T W 3.5 O P UNI 20 VS = ±15V SUPPLIES WITH 1V p-p SINEWAVE 25°C 3.0 0
3
–60 –40 –20 0 20 40 60 80 100 120 140
10 0
10 100 1k 10k 100k 1M
01 3- 3-
TEMPERATURE (°C)
82
SUPPLY MODULATION FREQUENCY (Hz)
82 00 00 Figure 10. Unity-Gain Bandwidth vs. Temperature Figure 13. Power Supply Rejection vs. Frequency Rev. I | Page 7 of 20 Document Outline FEATURES CONNECTION DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS SETTLING TIME OPTIMIZING SETTLING TIME OP AMP SETTLING TIME—A MATHEMATICAL MODEL APPLICATIONS INFORMATION GUARDING DAC CONVERTER APPLICATIONS NOISE CHARACTERISTICS DRIVING THE ANALOG INPUT OF AN ADC DRIVING A LARGE CAPACITIVE LOAD FILTERS ACTIVE FILTER APPLICATIONS SECOND-ORDER LOW-PASS FILTER 9-POLE CHEBYCHEV FILTER OUTLINE DIMENSIONS ORDERING GUIDE