Datasheet ADRF5545A (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End |
| Pages / Page | 20 / 1 — Dual-Channel, 2.4 GHz to 4.2 GHz. Receiver Front End. Data Sheet. … |
| Revision | B |
| File Format / Size | PDF / 441 Kb |
| Document Language | English |
Dual-Channel, 2.4 GHz to 4.2 GHz. Receiver Front End. Data Sheet. ADRF5545A. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
Dual-Channel, 2.4 GHz to 4.2 GHz Receiver Front End Data Sheet ADRF5545A FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated dual-channel RF front end ADRF5545A 2-stage LNA and high power SPDT switch On-chip bias and matching -CHA CHA CHA Single supply operation ND C ND ND ND C C Gain G TERM NI G G G VDD1- NI NI VDD2- 40 39 38 37 36 35 34 33 32 31 High gain mode: 32 dB typical at 3.6 GHz Low gain mode: 16 dB typical at 3.6 GHz GND 1 30 GND GND 2 29 RXOUT-CHA Low noise figure ANT-CHA 3 28 GND High gain mode: 1.45 dB typical at 3.6 GHz GND 4 27 BP-CHA SWCTRL-CHAB 5 26 PD-CHAB Low gain mode: 1.45 dB typical at 3.6 GHz SWVDD-CHAB 6 25 NIC GND 7 24 BP-CHB High isolation ANT-CHB 8 23 GND GND 9 22 RXOUT-CHB RXOUT-CHA and RXOUT-CHB: 47 dB typical GND 10 21 GND TERM-CHA and TERM-CHB: 52 dB typical 11 12 13 14 15 16 17 18 19 20 Low insertion loss: 0.65 dB typical at 3.6 GHz ND C C C NI ND ND ND NI NI High power handling at T G G G G CHB CHB CASE = 105°C -CHB
001
Full lifetime TERM VDD1- VDD2-
20051-
LTE average power (9 dB PAR): 40 dBm
Figure 1.
Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 32 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 6 mm × 6 mm, 40-lead LFCSP package APPLICATIONS Wireless infrastructure TDD massive multiple input and multiple output and active antenna systems TDD-based communication systems GENERAL DESCRIPTION
The ADRF5545A is a dual-channel, integrated radio frequency current of 36 mA. In power-down mode, the LNAs are turned (RF), front-end multichip module designed for time division off and the device draws 12 mA. duplexing (TDD) applications that operates from 2.4 GHz to In transmit operation, when RF inputs are connected to a 4.2 GHz. The ADRF5545A is configured in dual channels with termination pin (TERM-CHA or TERM-CHB), the switch a cascading two-stage low noise amplifier (LNA) and a high provides a low insertion loss of 0.65 dB and handles long-term power silicon single-pole, double-throw (SPDT) switch. evolution (LTE) average power (9 dB peak to average ratio In high gain mode, the cascaded two-stage LNA and switch (PAR)) of 40 dBm for ful lifetime operation and 43 dBm for offer a low noise figure (NF) of 1.45 dB and a high gain of single event (<10 sec) LNA protection operation. 32 dB at 3.6 GHz with an output third-order intercept point The device comes in an RoHS compliant, compact, 6 mm × (OIP3) of 32 dBm (typical). In low gain mode, one stage of the 6 mm, 40-lead LFCSP package. two-stage LNA is in bypass, providing 16 dB of gain at a lower
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. No license is granted by implication or otherwise under any patent or patent rights of Analog Tel: 781.329.4700 ©2019–2020 Analog Devices, Inc. All rights reserved. Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS 2.6 GHZ TUNED OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION RECEIVE OPERATION, HIGH GAIN MODE WITH 2.6 GHZ TUNING RECEIVE OPERATION, LOW GAIN MODE WITH 2.6 GHz TUNING TRANSMIT OPERATION AT WITH 2.6 GHz TUNING THEORY OF OPERATION SIGNAL PATH SELECT Transmit Operation Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION 2.6 GHZ OPERATION OUTLINE DIMENSIONS ORDERING GUIDE
001
Full lifetime TERM VDD1- VDD2-
20051-
LTE average power (9 dB PAR): 40 dBm
Figure 1.
Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 32 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 6 mm × 6 mm, 40-lead LFCSP package APPLICATIONS Wireless infrastructure TDD massive multiple input and multiple output and active antenna systems TDD-based communication systems GENERAL DESCRIPTION
The ADRF5545A is a dual-channel, integrated radio frequency current of 36 mA. In power-down mode, the LNAs are turned (RF), front-end multichip module designed for time division off and the device draws 12 mA. duplexing (TDD) applications that operates from 2.4 GHz to In transmit operation, when RF inputs are connected to a 4.2 GHz. The ADRF5545A is configured in dual channels with termination pin (TERM-CHA or TERM-CHB), the switch a cascading two-stage low noise amplifier (LNA) and a high provides a low insertion loss of 0.65 dB and handles long-term power silicon single-pole, double-throw (SPDT) switch. evolution (LTE) average power (9 dB peak to average ratio In high gain mode, the cascaded two-stage LNA and switch (PAR)) of 40 dBm for ful lifetime operation and 43 dBm for offer a low noise figure (NF) of 1.45 dB and a high gain of single event (<10 sec) LNA protection operation. 32 dB at 3.6 GHz with an output third-order intercept point The device comes in an RoHS compliant, compact, 6 mm × (OIP3) of 32 dBm (typical). In low gain mode, one stage of the 6 mm, 40-lead LFCSP package. two-stage LNA is in bypass, providing 16 dB of gain at a lower
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. No license is granted by implication or otherwise under any patent or patent rights of Analog Tel: 781.329.4700 ©2019–2020 Analog Devices, Inc. All rights reserved. Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS 2.6 GHZ TUNED OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION RECEIVE OPERATION, HIGH GAIN MODE WITH 2.6 GHZ TUNING RECEIVE OPERATION, LOW GAIN MODE WITH 2.6 GHz TUNING TRANSMIT OPERATION AT WITH 2.6 GHz TUNING THEORY OF OPERATION SIGNAL PATH SELECT Transmit Operation Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION 2.6 GHZ OPERATION OUTLINE DIMENSIONS ORDERING GUIDE
