link to page 18 link to page 18 link to page 18 link to page 18 AD8318Data Sheet+5VAD8318OUTPUTPULSED RF+5VINPUT1nFVPOS40Ω50ΩINHIVOUT52.3ΩAD8318ADCMP563INLOVSET1nF50ΩGND50Ω50Ω100Ω100ΩCOMPARATOR–5.2VOUTPUT 040 VREF = 1.8V–1.2V 53- –5.2V 048 Figure 39. AD8318 Operating with the High Speed ADCMP563 Comparator RESPONSE TIME CAPABILITY Figure 40 shows the response of the AD8318 and the comparator The AD8318 has a 10 ns rise/fall time capability (10% to 90%) for a 500 MHz pulsed sine wave of varying amplitudes. The for input power switching between the noise floor and 0 dBm. output level of the AD8318 is the signal strength of the input This capability enables RF burst measurements at repetition signal. For applications where these RF bursts are very small, rates beyond 45 MHz. In most measurement applications, the the output level does not change by a large amount. Using a AD8318 has an external capacitor connected to CLPF to provide comparator is beneficial in this case because it turns the output additional filtering for VOUT. However, using the CLPF capacitor of the log amp into a limiter-like signal. While this configuration slows the response time as does stray capacitance on VOUT. For does result in the loss of received signal power level, it does an application requiring maximum RF burst detection capability, allow for presence-only detection of low power RF bursts. the CLPF pin is left unconnected. In this case, the integration OUTPUT FILTERING function is provided by the 1.5 pF on-chip capacitor. For applications in which maximum video bandwidth and, There is a 10 Ω internal resistor in series with the output driver. consequently, fast rise time are desired, it is essential that the Because of this resistor, it is necessary to add an external 40 Ω CLPF pin be left unconnected and free of any stray capacitance. back-terminating resistor in series with the output when driving To reduce the nominal output video bandwidth of 45 MHz, a 50 Ω load. Place the back-terminating resistor close to the connect a ground-referenced capacitor (CFLT) to the CLPF pin, VOUT pin. The AD8318 has the drive capability to drive a 50 Ω as shown in Figure 41. Generally, this is done to reduce output load at the end of a coaxial cable or transmission line when back ripple (at twice the input frequency for a symmetric input terminated (see Figure 39). waveform, such as sinusoidal signals). The circuit diagram in Figure 39 shows the AD8318 used with a high speed comparator circuit. The 40 Ω series resistor at the AD8318 output of the AD8318 combines with an internal 10 Ω to ILOGVOUT properly match to the 50 Ω input of the comparator. +43.13kΩCLPF1.5pFPULSED RF–50dB–30dB–20dB–10dBINPUT 2 CFLT 04 53- 48 0 Figure 41. Lowering the Postdemodulation Bandwidth AD8318 CFLT is selected by OUTPUT 1 COMPARATOR C 1.5 (19) OUTPUT FLT π3.13 kΩVideoBandwidth pF 41 Set the video bandwidth to a frequency equal to about one- 0 3- 85 tenth the minimum input frequency. This ensures that the 04 0100200300400500600700800 output ripple of the demodulated log output, which is at twice TIME (ns) the input frequency, is well filtered. Figure 40. Pulse Response of AD8318 and Comparator for RF Pulses of Varying Amplitudes Rev. D | Page 18 of 24 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Using the AD8318 Basic Connections Enable Interface Input Signal Coupling Output Interface Setpoint Interface Temperature Compensation of Output Voltage Temperature Sensor Measurement Mode Device Calibration and Error Calculation Selecting Calibration Points to Improve Accuracy over a Reduced Range Variation in Temperature Drift from Device to Device Temperature Drift at Different Temperatures Setting the Output Slope in Measurement Mode Response Time Capability Output Filtering Controller Mode Characterization Setup and Methods Evaluation Board Outline Dimensions Ordering Guide