Datasheet AD8325 (Analog Devices)

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5 V CATV Line Driver Fine Step Output Power Control AD8325 FEATURES FUNCTIONAL BLOCK DIAGRAM Supports DOCSIS Standard for Reverse Path VCC (7 PINS) BYP Transmission Gain Programmable in 0.75 dB Steps Over a 59.45 dB R1 Range AD8325 Low Distortion at 61 dBmV Output VIN+ VOUT+ –57 dBc SFDR at 21 MHz DIFF OR SINGLE VERNIER ATTENUATION POWER INPUT CORE AMP –55 dBc SFDR at 42 MHz VIN– AMP VOUT– Output Noise Level ZOUT DIFF = 8 75
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–48 dBmV in 160 kHz R2 DECODE Maintains 75
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Output Impedance ZIN (SINGLE) = 800
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8 POWER-DOWN Transmit Enable and Transmit Disable Modes ZIN (DIFF) = 1.6k
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LOGIC DATA LATCH Upper Bandwidth: 100 MHz (Full Gain Range) 8 5 V Supply Operation SHIFT Supports SPI Interfaces REGISTER APPLICATIONS Gain-Programmable Line Driver DATEN DATA CLK GND (11 PINS) TXEN SLEEP DOCSIS High-Speed Data Modems Interactive Cable Set-Top Boxes PC Plug-in Cable Modems General-Purpose Digitally Controlled Variable Gain Block GENERAL DESCRIPTION
The AD8325 is a low-cost, digitally controlled, variable gain ampli­ fier optimized for coaxial line driving applications such as cable modems that are designed to the MCNS-DOCSIS upstream
–50
standard. An 8-bit serial word determines the desired output gain
VOUT = 62dBmV @ MAX GAIN
over a 59.45 dB range resulting in gain changes of 0.7526 dB/LSB.
–52 VOUT = 61dBmV
The AD8325 comprises a digitally controlled variable attenuator
@ MAX GAIN –54
of 0 dB to –59.45 dB, which is preceded by a low noise, fixed gain buffer and is followed by a low distortion high power ampli­
–56
fier. The AD8325 accepts a differential or single-ended input signal. The output is specified for driving a 75 W load, such as
–58
coaxial cable.
DISTORTION – dBc
Distortion performance of –57 dBc is achieved with an output
–60 VOUT = 60dBmV
level up to 61 dBmV at 21 MHz bandwidth. A key performance
@ MAX GAIN –62
and cost advantage of the AD8325 results from the ability to
VOUT = 59dBmV
maintain a constant 75 W output impedance during Transmit
@ MAX GAIN –64
Enable and Transmit Disable conditions. In addition, this
5 15 25 35 45 55 65
device has a sleep mode function that reduces the quiescent
FUNDAMENTAL FREQUENCY – MHz
current to 4 mA. Figure 1. Worst Harmonic Distortion vs. Gain Control The AD8325 is packaged in a low-cost 28-lead TSSOP, operates from a single 5 V supply, and has an operational temperature range of –40∞C to +85∞C. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS LOGIC INPUTS TIMING REQUIREMENTS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics APPLICATIONS General Application Operational Description SPI Programming and Gain Adjustment Input Bias, Impedance, and Termination Output Bias, Impedance, and Termination Power Supply Decoupling, Grounding, and Layout Considerations Initial Power-Up Between Burst Operation Distortion, Adjacent Channel Power, and DOCSIS Noise and DOCSIS Evaluation Board Features and Operation Overshoot on PC Printer Ports Transformer and Diplexer Differential Inputs Single-Ended-to-Differential Input Differential Input Installing the Visual Basic Control Software Running the Software Controlling the Gain/Attenuation of the AD8325 Transmit Enable, Transmit Disable, and Sleep Memory Section EVALUATION BOARD FEATURES AND OPERATION EVALUATION BOARD BILL OF MATERIALS OUTLINE DIMENSIONS Revision History