Datasheet LM73100 (Texas Instruments) - 5

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LM7310 www.ti.com
SNOSDC0A – OCTOBER 2020 – REVISED DECEMBER 2020
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Parameter Pin MIN MAX UNIT
VIN Input Voltage Range IN 2.7 23 V VOUT Output Voltage Range OUT min (23, VIN + 20) V VEN/UVLO Enable Pin Voltage Range EN/UVLO 5 (2) V VOVLO OVLO Pin Voltage Range OVLO 0.5 1.5 V VdVdT dVdT Capacitor Voltage Rating dVdt VIN + 5 V (1) V VPGTH PGTH Pin Voltage Range PGTH 5 (3) V VPG PG Pin Voltage Range PG 5 (3) V VIMON IMON Pin Voltage IMON 1.5 V IMAX Continuous Switch Current, TJ ≤ 125 ℃ IN to OUT 5.5 A TJ Junction temperature –40 125 °C (1) In a PowerMUX/ORing scenario with unequal supplies, the dVdt capacitor rating for each device should be chosen based on the highest of the 2 rails. (2) For supply voltages below 5V, it is okay to pull up the EN pin to IN directly. For supply voltages greater than 5V or systems which can be exposed to reverse polarity on input supply, it is recommended to use a pull-up resistor with a minimum value of 350 kΩ. (3) For systems which can be exposed to reverse polarity on input supply, if this pin is referred to input supply, it is recommended to use a pull-up resistor with a minimum value of 350 kΩ to limit the current through the pin.
6.4 Thermal Information LM73100 THERMAL METRIC (1) RPW (QFN) UNIT 10 PINS
41.7 (2) °C/W RθJA Junction-to-ambient thermal resistance 74.5 (3) °C/W ΨJT Junction-to-top characterization parameter 1 °C/W 20 (2) °C/W ΨJB Junction-to-board characterization parameter 27.6 (3) °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) Based on simulations conducted with the device mounted on a custom 4-layer PCB (2s2p) with 8 thermal vias under device (3) Based on simulations conducted with the device mounted on a JEDEC 4-layer PCB (2s2p) with no thermal vias under device Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: LM7310 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Timing Requirements 6.7 Switching Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Reverse Polarity Protection 7.3.2 Undervoltage Protection (UVLO & UVP) 7.3.3 Overvoltage Lockout (OVLO) 7.3.4 Inrush Current control and Fast-trip 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control 7.3.4.2 Fast-Trip During Steady State 7.3.5 Analog Load Current Monitor Output 7.3.6 Reverse Current Protection 7.3.7 Overtemperature Protection (OTP) 7.3.8 Fault Response 7.3.9 Power Good Indication (PG) 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Single Device, Self-Controlled 8.2.1 Typical Application 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds 8.2.1.2.2 Setting Output Voltage Rise Time (tR) 8.2.1.2.3 Setting Power Good Assertion Threshold 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range 8.2.1.3 Application Curves 8.3 Active ORing 8.4 Priority Power MUXing 8.5 USB PD Port Protection 8.6 Parallel Operation 9 Power Supply Recommendations 9.1 Transient Protection 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information