Datasheet LM73100 (Texas Instruments) - 6
| Manufacturer | Texas Instruments |
| Description | 2.7 -23 V, 5.5 A Integrated Ideal Diode with Input Reverse Polarity and Overvoltage Protection |
| Pages / Page | 52 / 6 — LM7310. www.ti.com. 6.5 Electrical Characteristics. Test. Description. … |
| File Format / Size | PDF / 5.1 Mb |
| Document Language | English |
LM7310. www.ti.com. 6.5 Electrical Characteristics. Test. Description. MIN. TYP. MAX. UNITS. Parameter. INPUT SUPPLY (IN)
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LM7310
SNOSDC0A – OCTOBER 2020 – REVISED DECEMBER 2020
www.ti.com 6.5 Electrical Characteristics
(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12 V, VEN/UVLO = 2 V, VOVLO = 0 V, dVdT = Open, RIMON = 549 Ω, PGTH = Open, PG = Open, OUT = Open. All voltages referenced to GND.
Test Description MIN TYP MAX UNITS Parameter INPUT SUPPLY (IN)
VUVP(R) IN supply UVP rising threshold 2.44 2.53 2.64 V VUVP(F) IN supply UVP falling threshold 2.35 2.42 2.55 V IN supply quiescent current, VIN = 2.7 V 347 492 µA IQ(ON) IN supply quiescent current, VIN = 12 V 426 509 µA IN supply quiescent current, VIN = 23 V 459 612 µA IQ(RCB) IN supply quiescent current during RCB, VOUT > VIN 189.7 234 µA IQ(OFF) IN supply disabled state current (VSD(F) < VEN < VUVLO(R)) 74.5 97.6 µA ISD IN supply shutdown current (VEN < VSD(F)) 4.6 8.2 µA IQ(OVLO) IN supply OFF state current (OVLO condition), VOUT > VIN 191 µA IINLKG(IRPP) IN supply leakage current (VIN = –14 V, VOUT = 0 V) -3.5 µA
ON RESISTANCE (IN - OUT)
VIN = 12 V, IOUT = 3 A, TJ = 25 ℃ 28.4 mΩ RON 2.7 ≤ VIN ≤ 23 V, –40 ℃ ≤ TJ ≤ 125 ℃ 44.85 mΩ
ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO rising threshold 1.183 1.2 1.223 V VUVLO(F) EN/UVLO falling threshold 1.076 1.09 1.116 V VSD(F) EN/UVLO falling threshold for lowest shutdown current 0.45 0.74 V IENLKG EN/UVLO leakage current –0.1 0.1 µA
OVERVOLTAGE LOCKOUT (OVLO)
VOV(R) OVLO rising threshold 1.183 1.2 1.223 V VOV(F) OVLO falling threshold 1.076 1.09 1.116 V IOVLKG OVLO pin leakage current, 0.5 V < VOVLO < 1.5 V –0.1 0.1 µA IOUTLKG(OVLO) OUT leakage current (OVLO condition), VOUT > VIN 317 µA
FIXED FAST-TRIP (OUT)
IFT Fixed fast-trip current threshold 21.9 A
OUTPUT LOAD CURRENT MONITOR (IMON)
Analog load current monitor gain (IMON : IOUT), IOUT = 0.5 A to 144 181 216 µA/A 1 A GIMON Analog load current monitor gain (IMON : IOUT), IOUT = 1 A to 153 181 207 µA/A 5.5 A
REVERSE CURRENT BLOCKING (IN - OUT)
VFWD (VIN - VOUT) forward regulation voltage, IOUT = 10 mA 4.8 16.4 28.4 mV (V V OUT - VIN) threshold for fast BFET turn off (enter reverse REVTH 22.7 29.3 36.5 mV current blocking) (V V IN - VOUT) threshold for fast BFET turn on (exit reverse FWDTH 85.9 105.8 125 mV current blocking) Reverse leakage current (unpowered condition), V I OUT = 12 REVLKG(OFF) 4.8 µA V, VIN = 0 V IREVLKG Reverse leakage current, (VOUT - VIN) = 21.5 V 10.10 15.86 µA OUT leakage current during RCB state while ON, (V I OUT - OUTLKG(RCB) 247.6 322 µA VIN) = 1 V 6 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM7310 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Timing Requirements 6.7 Switching Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Reverse Polarity Protection 7.3.2 Undervoltage Protection (UVLO & UVP) 7.3.3 Overvoltage Lockout (OVLO) 7.3.4 Inrush Current control and Fast-trip 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control 7.3.4.2 Fast-Trip During Steady State 7.3.5 Analog Load Current Monitor Output 7.3.6 Reverse Current Protection 7.3.7 Overtemperature Protection (OTP) 7.3.8 Fault Response 7.3.9 Power Good Indication (PG) 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Single Device, Self-Controlled 8.2.1 Typical Application 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds 8.2.1.2.2 Setting Output Voltage Rise Time (tR) 8.2.1.2.3 Setting Power Good Assertion Threshold 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range 8.2.1.3 Application Curves 8.3 Active ORing 8.4 Priority Power MUXing 8.5 USB PD Port Protection 8.6 Parallel Operation 9 Power Supply Recommendations 9.1 Transient Protection 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information
SNOSDC0A – OCTOBER 2020 – REVISED DECEMBER 2020
www.ti.com 6.5 Electrical Characteristics
(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12 V, VEN/UVLO = 2 V, VOVLO = 0 V, dVdT = Open, RIMON = 549 Ω, PGTH = Open, PG = Open, OUT = Open. All voltages referenced to GND.
Test Description MIN TYP MAX UNITS Parameter INPUT SUPPLY (IN)
VUVP(R) IN supply UVP rising threshold 2.44 2.53 2.64 V VUVP(F) IN supply UVP falling threshold 2.35 2.42 2.55 V IN supply quiescent current, VIN = 2.7 V 347 492 µA IQ(ON) IN supply quiescent current, VIN = 12 V 426 509 µA IN supply quiescent current, VIN = 23 V 459 612 µA IQ(RCB) IN supply quiescent current during RCB, VOUT > VIN 189.7 234 µA IQ(OFF) IN supply disabled state current (VSD(F) < VEN < VUVLO(R)) 74.5 97.6 µA ISD IN supply shutdown current (VEN < VSD(F)) 4.6 8.2 µA IQ(OVLO) IN supply OFF state current (OVLO condition), VOUT > VIN 191 µA IINLKG(IRPP) IN supply leakage current (VIN = –14 V, VOUT = 0 V) -3.5 µA
ON RESISTANCE (IN - OUT)
VIN = 12 V, IOUT = 3 A, TJ = 25 ℃ 28.4 mΩ RON 2.7 ≤ VIN ≤ 23 V, –40 ℃ ≤ TJ ≤ 125 ℃ 44.85 mΩ
ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO rising threshold 1.183 1.2 1.223 V VUVLO(F) EN/UVLO falling threshold 1.076 1.09 1.116 V VSD(F) EN/UVLO falling threshold for lowest shutdown current 0.45 0.74 V IENLKG EN/UVLO leakage current –0.1 0.1 µA
OVERVOLTAGE LOCKOUT (OVLO)
VOV(R) OVLO rising threshold 1.183 1.2 1.223 V VOV(F) OVLO falling threshold 1.076 1.09 1.116 V IOVLKG OVLO pin leakage current, 0.5 V < VOVLO < 1.5 V –0.1 0.1 µA IOUTLKG(OVLO) OUT leakage current (OVLO condition), VOUT > VIN 317 µA
FIXED FAST-TRIP (OUT)
IFT Fixed fast-trip current threshold 21.9 A
OUTPUT LOAD CURRENT MONITOR (IMON)
Analog load current monitor gain (IMON : IOUT), IOUT = 0.5 A to 144 181 216 µA/A 1 A GIMON Analog load current monitor gain (IMON : IOUT), IOUT = 1 A to 153 181 207 µA/A 5.5 A
REVERSE CURRENT BLOCKING (IN - OUT)
VFWD (VIN - VOUT) forward regulation voltage, IOUT = 10 mA 4.8 16.4 28.4 mV (V V OUT - VIN) threshold for fast BFET turn off (enter reverse REVTH 22.7 29.3 36.5 mV current blocking) (V V IN - VOUT) threshold for fast BFET turn on (exit reverse FWDTH 85.9 105.8 125 mV current blocking) Reverse leakage current (unpowered condition), V I OUT = 12 REVLKG(OFF) 4.8 µA V, VIN = 0 V IREVLKG Reverse leakage current, (VOUT - VIN) = 21.5 V 10.10 15.86 µA OUT leakage current during RCB state while ON, (V I OUT - OUTLKG(RCB) 247.6 322 µA VIN) = 1 V 6 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: LM7310 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Timing Requirements 6.7 Switching Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Reverse Polarity Protection 7.3.2 Undervoltage Protection (UVLO & UVP) 7.3.3 Overvoltage Lockout (OVLO) 7.3.4 Inrush Current control and Fast-trip 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control 7.3.4.2 Fast-Trip During Steady State 7.3.5 Analog Load Current Monitor Output 7.3.6 Reverse Current Protection 7.3.7 Overtemperature Protection (OTP) 7.3.8 Fault Response 7.3.9 Power Good Indication (PG) 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Single Device, Self-Controlled 8.2.1 Typical Application 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds 8.2.1.2.2 Setting Output Voltage Rise Time (tR) 8.2.1.2.3 Setting Power Good Assertion Threshold 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range 8.2.1.3 Application Curves 8.3 Active ORing 8.4 Priority Power MUXing 8.5 USB PD Port Protection 8.6 Parallel Operation 9 Power Supply Recommendations 9.1 Transient Protection 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information
