Datasheet RDA5807FP (RDA Microelectronics) - 5
| Manufacturer | RDA Microelectronics |
| Description | Single-Chip Broadcast FM Radio Tuner |
| Pages / Page | 23 / 5 — 3.5 Control Interface. 3.6 I S Audio Data Interface. 3.7 GPIO Outputs |
| Revision | 1.0 |
| File Format / Size | PDF / 666 Kb |
| Document Language | English |
3.5 Control Interface. 3.6 I S Audio Data Interface. 3.7 GPIO Outputs
Model Line for this Datasheet
Text Version of Document
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2 out NACK for last data byte, and then RDA5807FP will return the bus to MCU, and MCU
3.5 Control Interface
will give out STOP condition.
2
The RDA5807FP only supports I2C control
3.6 I S Audio Data Interface
interface. The RDA5807FP supports I2S (Inter_IC Sound The I2C interface is compliant to I2C Bus Bus) audio interface. The interface is fully Specification 2.1. It includes two pins: SCLK and compliant with I2S bus specification. When setting SDIO. A I2C interface transfer begins with START I2SEN bit high, RDA5807FP will output SCK, WS, condition, a command byte and data bytes, each SD signals from GPIO3, GPIO1, GPIO2 as I2S byte has a followed ACK (or NACK) bit, and ends master and transmitter, the sample rate is with STOP condition. The command byte includes 48Kbps，44.1kbps,32kbps….. RDA5807FP also a 7-bit chip address (0010000b) and a R/W bit. support as I2S slaver mode and transmitter, the The ACK (or NACK) is always sent out by receiver. sample rate is less than 100kbps. When in write transfer, data bytes is written out from MCU, and when in read transfer, data bytes is read out from RDA5807FP. There is no visible
3.7 GPIO Outputs
register address in I2C interface transfers. The I2C interface has a fixed start register address (0x02h The RDA5807FP has three GPIOs. The function for write transfer and 0x0Ah for read transfer), and of GPIOs could programmed with bits GPIO1[1:0], an internal incremental address counter. If register GPIO2[1:0], GPIO3[1:0] and I2SEN. address meets the end of register file, 0x3Ah, register address will wrap back to 0x00h. For write If I2SEN is set to low, GPIO pins could be transfer, MCU programs registers from register programmed to output low or high or high-Z, or be 0x02h high byte, then register 0x02h low byte, programmed to output interrupt and stereo then register 0x03h high byte, till the last register. indicator with bits GPIO1[1:0], GPIO2[1:0], RDA5807FP always gives out ACK after every GPIO3[1:0]. GPIO2 could be programmed to byte, and MCU gives out STOP condition when output a low interrupt (interrupt will be generated register programming is finished. For read transfer, only with interrupt enable bit STCIEN is set to high) after command byte from MCU, RDA5807FP when seek/tune process completes. GPIO3 could sends out register 0x0Ah high byte, then register be programmed to output stereo indicator bit ST. 0x0Ah low byte, then register 0x0Bh high byte, till Constant low, high or high-Z functionality is receives NACK from MCU. MCU gives out ACK available regardless of the state of VDD supplies for data bytes besides last data byte. MCU gives or the ENABLE bit. SCK WS LEFT CHANNEL RIGHT CHANNEL 1 SCK 1 SCK SD MSB LSB MSB LSB Figure 3-2 I2S Digital Audio Format The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of RDA. Page 5 of 23 Document Outline 1 General Description Features Applications 2 Table of Contents 3 Functional Description 3.1 FM Receiver Synthesizer Power Supply RESET and Control Interface select Control Interface IP2PS Audio Data Interface GPIO Outputs 4 Electrical Characteristics 5 Receiver Characteristics 6 Serial Interface 6.1 IP2PC Interface Timing 7 Register Definition 8 Pins Description 9 Application Diagram 9.1 RDA5807FP Common Application : Bill of Materials: 10 Physical Dimension 11 PCB Land Pattern： 12 Change List Contact Information
3.5 Control Interface
will give out STOP condition.
2
The RDA5807FP only supports I2C control
3.6 I S Audio Data Interface
interface. The RDA5807FP supports I2S (Inter_IC Sound The I2C interface is compliant to I2C Bus Bus) audio interface. The interface is fully Specification 2.1. It includes two pins: SCLK and compliant with I2S bus specification. When setting SDIO. A I2C interface transfer begins with START I2SEN bit high, RDA5807FP will output SCK, WS, condition, a command byte and data bytes, each SD signals from GPIO3, GPIO1, GPIO2 as I2S byte has a followed ACK (or NACK) bit, and ends master and transmitter, the sample rate is with STOP condition. The command byte includes 48Kbps，44.1kbps,32kbps….. RDA5807FP also a 7-bit chip address (0010000b) and a R/W bit. support as I2S slaver mode and transmitter, the The ACK (or NACK) is always sent out by receiver. sample rate is less than 100kbps. When in write transfer, data bytes is written out from MCU, and when in read transfer, data bytes is read out from RDA5807FP. There is no visible
3.7 GPIO Outputs
register address in I2C interface transfers. The I2C interface has a fixed start register address (0x02h The RDA5807FP has three GPIOs. The function for write transfer and 0x0Ah for read transfer), and of GPIOs could programmed with bits GPIO1[1:0], an internal incremental address counter. If register GPIO2[1:0], GPIO3[1:0] and I2SEN. address meets the end of register file, 0x3Ah, register address will wrap back to 0x00h. For write If I2SEN is set to low, GPIO pins could be transfer, MCU programs registers from register programmed to output low or high or high-Z, or be 0x02h high byte, then register 0x02h low byte, programmed to output interrupt and stereo then register 0x03h high byte, till the last register. indicator with bits GPIO1[1:0], GPIO2[1:0], RDA5807FP always gives out ACK after every GPIO3[1:0]. GPIO2 could be programmed to byte, and MCU gives out STOP condition when output a low interrupt (interrupt will be generated register programming is finished. For read transfer, only with interrupt enable bit STCIEN is set to high) after command byte from MCU, RDA5807FP when seek/tune process completes. GPIO3 could sends out register 0x0Ah high byte, then register be programmed to output stereo indicator bit ST. 0x0Ah low byte, then register 0x0Bh high byte, till Constant low, high or high-Z functionality is receives NACK from MCU. MCU gives out ACK available regardless of the state of VDD supplies for data bytes besides last data byte. MCU gives or the ENABLE bit. SCK WS LEFT CHANNEL RIGHT CHANNEL 1 SCK 1 SCK SD MSB LSB MSB LSB Figure 3-2 I2S Digital Audio Format The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of RDA. Page 5 of 23 Document Outline 1 General Description Features Applications 2 Table of Contents 3 Functional Description 3.1 FM Receiver Synthesizer Power Supply RESET and Control Interface select Control Interface IP2PS Audio Data Interface GPIO Outputs 4 Electrical Characteristics 5 Receiver Characteristics 6 Serial Interface 6.1 IP2PC Interface Timing 7 Register Definition 8 Pins Description 9 Application Diagram 9.1 RDA5807FP Common Application : Bill of Materials: 10 Physical Dimension 11 PCB Land Pattern： 12 Change List Contact Information
