Datasheet ADG798-KGD (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | High Temperature, Low Voltage, 8-Channel Multiplexer |
| Pages / Page | 13 / 4 — ADG798-KGD. Known Good Die. Table 2. −55°C. TA ≤ +175°C. −55°C ≤ TA ≤ … |
| File Format / Size | PDF / 822 Kb |
| Document Language | English |
ADG798-KGD. Known Good Die. Table 2. −55°C. TA ≤ +175°C. −55°C ≤ TA ≤ +210°C. Parameter. Symbol. Test Conditions/Comments. Min. Typ1 Max
Model Line for this Datasheet
Text Version of Document
link to page 10 link to page 10 link to page 10 link to page 10 link to page 10 link to page 10 link to page 11 link to page 11 link to page 11 link to page 11 link to page 11 link to page 12
ADG798-KGD Known Good Die
VDD = 3.3 V ± 10%, VSS = 0 V, GND = 0 V, −55°C ≤ TA ≤ +210°C, unless otherwise noted.
Table 2. −55°C ≤ TA ≤ +175°C −55°C ≤ TA ≤ +210°C Parameter Symbol Test Conditions/Comments Min Typ1 Max Min Typ1 Max Unit
ANALOG SWITCH Analog Signal Range 0 VDD 0 VDD V On Resistance RON VS = 0 V to VDD, IDS = 10 mA, 7 15 8 20 Ω see Figure 3 Matching Between Channels ΔRON VS = 0 V to VDD, IDS = 10 mA 0.4 1.2 0.5 1.5 Ω Flatness RFLAT (ON) VS = 0 V to VDD, IDS = 10 mA 2.5 3.5 3 4.5 Ω LEAKAGE CURRENTS VDD = 3.3 V Source Off Leakage IS (Off) VD = 2.3 V/1 V, VS = 1 V/2.3 V, −50 ±0.01 +50 −180 ±0.01 +180 nA see Figure 4 Drain Off Leakage ID (Off ) VD = 2.3 V/1 V, VS = 1 V/2.3 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 5 Channel On Leakage ID, IS (On) VD = VS = 1 V or 2.3 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 6 DIGITAL INPUTS Input Voltage High VINH 2.0 2.0 V Low VINL 0.8 0.8 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF, 18 34 18 38 ns see Figure 7, VS1 = 2 V/0 V, VS8 = 0 V/2 V Break-Before-Make Time Delay tOPEN RL = 150 Ω, CL = 15 pF, 1 10 1 10 ns VS = 2 V, see Figure 8 TA = maximum temperature 15 15 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF, 14 26 14 28 ns VS = 2 V, see Figure 9 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF, 8.5 16 8.5 17 ns VS = 2 V, see Figure 9 Charge Injection QINJ VS = 1.5 V, RS = 0 Ω, CL = 1 nF, ±3 ±3 pC see Figure 10 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 11 Channel to Channel Crosstalk RL = 50 Ω, CL = 5 pF, −60 −60 dB f = 10 MHz RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 12 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF, 55 55 MHz see Figure 13 Source Capacitance, Off CS (Off ) f = 1 MHz 13 13 pF Drain Capacitance, Off CD (Off ) f = 1 MHz 85 85 pF Source/Drain Capacitance, On CD, CS (On) f = 1 MHz 96 96 pF POWER REQUIREMENTS Supply Current IDD VDD = 3.3 V, 5 35 40 70 μA digital inputs = 0 V or 3.3 V 1 TA = 25°C, except for the analog switch and power requirements values where TA = 175°C or 210°C. Rev. 0 | Page 4 of 13 Document Outline FEATURES APPLICATIONS METAL MASK DIE IMAGE GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D PEAK CURRENT PER CHANNEL, Sx OR D (PULSED AT 1 MS, 10% DUTY CYCLE MAXIMUM) ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TEST CIRCUITS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
ADG798-KGD Known Good Die
VDD = 3.3 V ± 10%, VSS = 0 V, GND = 0 V, −55°C ≤ TA ≤ +210°C, unless otherwise noted.
Table 2. −55°C ≤ TA ≤ +175°C −55°C ≤ TA ≤ +210°C Parameter Symbol Test Conditions/Comments Min Typ1 Max Min Typ1 Max Unit
ANALOG SWITCH Analog Signal Range 0 VDD 0 VDD V On Resistance RON VS = 0 V to VDD, IDS = 10 mA, 7 15 8 20 Ω see Figure 3 Matching Between Channels ΔRON VS = 0 V to VDD, IDS = 10 mA 0.4 1.2 0.5 1.5 Ω Flatness RFLAT (ON) VS = 0 V to VDD, IDS = 10 mA 2.5 3.5 3 4.5 Ω LEAKAGE CURRENTS VDD = 3.3 V Source Off Leakage IS (Off) VD = 2.3 V/1 V, VS = 1 V/2.3 V, −50 ±0.01 +50 −180 ±0.01 +180 nA see Figure 4 Drain Off Leakage ID (Off ) VD = 2.3 V/1 V, VS = 1 V/2.3 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 5 Channel On Leakage ID, IS (On) VD = VS = 1 V or 2.3 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 6 DIGITAL INPUTS Input Voltage High VINH 2.0 2.0 V Low VINL 0.8 0.8 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF, 18 34 18 38 ns see Figure 7, VS1 = 2 V/0 V, VS8 = 0 V/2 V Break-Before-Make Time Delay tOPEN RL = 150 Ω, CL = 15 pF, 1 10 1 10 ns VS = 2 V, see Figure 8 TA = maximum temperature 15 15 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF, 14 26 14 28 ns VS = 2 V, see Figure 9 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF, 8.5 16 8.5 17 ns VS = 2 V, see Figure 9 Charge Injection QINJ VS = 1.5 V, RS = 0 Ω, CL = 1 nF, ±3 ±3 pC see Figure 10 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 11 Channel to Channel Crosstalk RL = 50 Ω, CL = 5 pF, −60 −60 dB f = 10 MHz RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 12 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF, 55 55 MHz see Figure 13 Source Capacitance, Off CS (Off ) f = 1 MHz 13 13 pF Drain Capacitance, Off CD (Off ) f = 1 MHz 85 85 pF Source/Drain Capacitance, On CD, CS (On) f = 1 MHz 96 96 pF POWER REQUIREMENTS Supply Current IDD VDD = 3.3 V, 5 35 40 70 μA digital inputs = 0 V or 3.3 V 1 TA = 25°C, except for the analog switch and power requirements values where TA = 175°C or 210°C. Rev. 0 | Page 4 of 13 Document Outline FEATURES APPLICATIONS METAL MASK DIE IMAGE GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D PEAK CURRENT PER CHANNEL, Sx OR D (PULSED AT 1 MS, 10% DUTY CYCLE MAXIMUM) ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TEST CIRCUITS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
