Datasheet ADG1212-EP (Analog Devices) - 6

ManufacturerAnalog Devices
DescriptionLow Capacitance, Low Charge Injection, ±15 V/+12 V iCMOS Quad SPST Switches
Pages / Page12 / 6 — ADG1212-EP. Enhanced Product. PIN CONFIGURATION AND FUNCTION …
RevisionB
File Format / SizePDF / 337 Kb
Document LanguageEnglish

ADG1212-EP. Enhanced Product. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. IN1. 16 IN2. TOP VIEW. GND. (Not to Scale). IN4. IN3. NOTES

ADG1212-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 16 IN2 TOP VIEW GND (Not to Scale) IN4 IN3 NOTES

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ADG1212-EP Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 16 IN2 D1 2 15 D2 S1 3 14 S2 ADG1212-EP V 4 13 SS V TOP VIEW DD GND 5 (Not to Scale) 12 NC S4 6 11 S3 D4 7 10 D3 8 9 IN4 IN3 NOTES
2 00
1. NC = NO CONNECT. DO NOT
2- 01
CONNECT TO THIS PIN.
10 Figure 2. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 IN1 Logic Control Input. 2 D1 Drain Terminal. This pin can be an input or output. 3 S1 Source Terminal. This pin can be an input or output. 4 VSS Most Negative Power Supply Potential. 5 GND Ground (0 V) Reference. 6 S4 Source Terminal. This pin can be an input or output. 7 D4 Drain Terminal. This pin can be an input or output. 8 IN4 Logic Control Input. 9 IN3 Logic Control Input. 10 D3 Drain Terminal. This pin can be an input or output. 11 S3 Source Terminal. This pin can be an input or output. 12 NC No Connection. 13 VDD Most Positive Power Supply Potential. 14 S2 Source Terminal. This pin can be an input or output. 15 D2 Drain Terminal. This pin can be an input or output. 16 IN2 Logic Control Input. Rev. B | Page 6 of 12 Document Outline Features Enhanced Product Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications Dual Supply Single Supply Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Outline Dimensions Ordering Guide