Datasheet ADG772 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | CMOS Low Power Dual 2:1 Mux/Demux USB 2.0 (480 Mbps)/USB 1.1 (12 Mbps) |
| Pages / Page | 12 / 9 — Data Sheet. ADG772. TEST CIRCUITS. IDS. RON = V1/IDS. IS (OFF). ID (OFF). … |
| Revision | C |
| File Format / Size | PDF / 387 Kb |
| Document Language | English |
Data Sheet. ADG772. TEST CIRCUITS. IDS. RON = V1/IDS. IS (OFF). ID (OFF). ID (ON). VDD. 0.1µF. S1B. 50%. S1A. OUT. VIN. 50Ω. 35pF. 90%. VOUT. GND. tON. tOFF. 80%
Model Line for this Datasheet
Text Version of Document
Data Sheet ADG772 TEST CIRCUITS IDS V1 S D VS RON = V1/IDS
04 0 2- 69 06 Figure 21. On Resistance
IS (OFF) ID (OFF) S D A A VS VD
05 -0 92 66 0 Figure 22. Off Leakage
ID (ON) S D NC A
06
VD
-0 692 06 Figure 23. On Leakage
VDD 0.1µF VDD V S1B S V 50% 50% S1A D OUT VIN RL CL IN 50Ω 35pF 90% 90% VOUT GND
7
tON tOFF
-00 692 06 Figure 24. Switching Times, tON, tOFF
VDD 0.1µF 50% 50% V 0V DD VIN V S1B S VOUT S1A D V 80% OUT 80% RL CL IN 50Ω 35pF tBBM tBBM GND
8 0 0 2- 69 06 Figure 25. Break-Before-Make Time Delay, tBBM
VDD SWITCH ON SWITCH OFF VIN S1B NC D VS S1A VOUT IN 1nF VOUT ∆VOUT GND QINJ = CL × ∆VOUT
9 00 2- 69 06 Figure 26. Charge Injection Rev. C | Page 9 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
04 0 2- 69 06 Figure 21. On Resistance
IS (OFF) ID (OFF) S D A A VS VD
05 -0 92 66 0 Figure 22. Off Leakage
ID (ON) S D NC A
06
VD
-0 692 06 Figure 23. On Leakage
VDD 0.1µF VDD V S1B S V 50% 50% S1A D OUT VIN RL CL IN 50Ω 35pF 90% 90% VOUT GND
7
tON tOFF
-00 692 06 Figure 24. Switching Times, tON, tOFF
VDD 0.1µF 50% 50% V 0V DD VIN V S1B S VOUT S1A D V 80% OUT 80% RL CL IN 50Ω 35pF tBBM tBBM GND
8 0 0 2- 69 06 Figure 25. Break-Before-Make Time Delay, tBBM
VDD SWITCH ON SWITCH OFF VIN S1B NC D VS S1A VOUT IN 1nF VOUT ∆VOUT GND QINJ = CL × ∆VOUT
9 00 2- 69 06 Figure 26. Charge Injection Rev. C | Page 9 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
