Datasheet TLV9161, TLV9162, TLV9164 (Texas Instruments) - 10

ManufacturerTexas Instruments
DescriptionTLV916x 16V, 11MHz, Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp
Pages / Page69 / 10 — TLV9161, TL. V9162,. TLV9164. www.ti.com. 5.7 Electrical Characteristics …
File Format / SizePDF / 4.7 Mb
Document LanguageEnglish

TLV9161, TL. V9162,. TLV9164. www.ti.com. 5.7 Electrical Characteristics (continued). PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT

TLV9161, TL V9162, TLV9164 www.ti.com 5.7 Electrical Characteristics (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

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TLV9161, TL V9162, TLV9164
SBOSA68D – NOVEMBER 2021 – REVISED MARCH 2024
www.ti.com 5.7 Electrical Characteristics (continued)
For VS = (V+) – (V–) = 2.7 V to 16 V (±1.35 V to ±8 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
To 0.1%, VS = 16 V, VSTEP = 10 V, G = +1, CL = 20 pF 0.70 To 0.1%, VS = 16 V, VSTEP = 2 V, G = +1, CL = 20 pF 0.22 tS Settling time μs To 0.01%, VS = 16 V, VSTEP = 10 V, G = +1, CL = 20 pF 0.89 To 0.01%, VS = 16 V, VSTEP = 2 V, G = +1, CL = 20 pF 0.42 Phase margin G = +1, RL = 10 kΩ, CL = 20 pF 64 ° Overload recovery time VIN × gain > VS 120 ns 0.00005% VS = 16 V, VO = 3 VRMS, G = 1, f = 1 kHz 126 dB Total harmonic distortion + 0.0032% THD+N V noise S = 10 V, VO = 3 VRMS, G = 1, f = 1 kHz, RL = 128 Ω 90 dB 0.00032% VS = 10 V, VO = 0.4 VRMS, G = 1, f = 1 kHz, RL = 32 Ω 110 dB 10 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TLV9161 TLV9162 TLV9164 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information for Single Channel 5.5 Thermal Information for Dual Channel 5.6 Thermal Information for Quad Channel 5.7 Electrical Characteristics 5.8 Typical Characteristics 6 Detailed Description 6.1 Overview 6.2 Functional Block Diagram 6.3 Feature Description 6.3.1 Input Protection Circuitry 6.3.2 EMI Rejection 6.3.3 Thermal Protection 6.3.4 Capacitive Load and Stability 6.3.5 Common-Mode Voltage Range 6.3.6 Phase Reversal Protection 6.3.7 Electrical Overstress 6.3.8 Overload Recovery 6.3.9 Typical Specifications and Distributions 6.3.10 Packages With an Exposed Thermal Pad 6.3.11 Shutdown 6.4 Device Functional Modes 7 Application and Implementation 7.1 Application Information 7.2 Typical Applications 7.2.1 Low-Side Current Measurement 7.2.1.1 Design Requirements 7.2.1.2 Detailed Design Procedure 7.2.1.3 Application Curve 7.2.2 Buffered Multiplexer 7.3 Power Supply Recommendations 7.4 Layout 7.4.1 Layout Guidelines 7.4.2 Layout Example 8 Device and Documentation Support 8.1 Device Support 8.1.1 Development Support 8.1.1.1 TINA-TI™ (Free Software Download) 8.2 Documentation Support 8.2.1 Related Documentation 8.3 Receiving Notification of Documentation Updates 8.4 Support Resources 8.5 Trademarks 8.6 Electrostatic Discharge Caution 8.7 Glossary 9 Revision History 10 Mechanical, Packaging, and Orderable Information