Datasheet ICM7216A, ICM7216B, ICM7216D (Intersil) - 10
| Manufacturer | Intersil |
| Description | 8-Digit Multi-Function Frequency Counter/Timer |
| Pages / Page | 17 / 10 — ICM7216A, ICM7216B, ICM7216D. unit counter. Display Test. RESET Input. … |
| File Format / Size | PDF / 196 Kb |
| Document Language | English |
ICM7216A, ICM7216B, ICM7216D. unit counter. Display Test. RESET Input. 1MHz Select. MEASUREMENT IN PROGRESS
Model Line for this Datasheet
Text Version of Document
ICM7216A, ICM7216B, ICM7216D
digit drivers are all off, leaving the display lines floating, so the held ready to initiate a new measurement as soon as HOLD display can be shared with other devices. In this mode, the goes low. The latches which hold the main counter data are oscillator continues to run with a typical supply current of not updated, so the last complete measurement is displayed. 1.5mA with a 10MHz crystal, but no measurements are made In
unit counter
mode when HOLD input is at VDD, the and multiplexed inputs are inactive. A new measurement counter is not stopped or reset, but the display is frozen at cycle will be initiated when the HOLD input is switched to VSS. that instantaneous value. When HOLD goes low the count continues from the new value in the new counter.
Display Test
- Display will turn on with all the digits showing 8s and all decimal points on. The display will be blanked if
RESET Input
Display Off is selected at the same time. The RESET input resets the main counter, stops any mea-
1MHz Select
- The 1MHz select mode allows use of a 1MHz surement in progress, and enables the main counter latches, crystal with the same digit multiplex rate and time between resulting in an all zero output. A capacitor to ground will pre- measurement as with a 10MHz crystal. This is done by divid- vent any hang-ups on power-up. ing the oscillator frequency by 104 rather than 105. The deci-
MEASUREMENT IN PROGRESS
mal point is also shifted one digit to the right in period and time interval, since the least significant digit will be in µs This output is provided in lCM7216D. It stays low during increment rather than 0.1µs increment. measurements and goes high for intervals between mea- surements. It is provided for system interfacing and can
External Oscillator Enable
- In this mode, the signal at EXT drive a low power Schottky TTL or one ECL load if the ECL OSC INPUT is used as a timebase instead of the on-board device is powered from the same supply as lCM7216D. crystal oscillator (built around the OSC INPUT, OSC OUT- PUT inputs). This input can be used for an external stable
Decimal Point Position
temperature compensated crystal oscillator or for special measurements with any external source. The on-board crys- Table 3 shows the decimal point position for different modes tal oscillator continues to work when the external oscillator is of lCM7216 operation. Note that the digit 1 is the least signif- selected. This is necessary to avoid hang-up problems, and icant digit. Table 3 is for 10MHz timebase frequency. has no effect on the chip's functional operation. If the on-
Overflow Indication
board oscillator frequency is less than 1MHz or only the external oscillator is used, THE OSC INPUT MUST BE When overflow happens in any measurement it will be indicated CONNECTED TO THE EXT OSC INPUT providing the time- on the decimal point of the digit 8. A separate LED indicator can base has enough voltage swing for OSC INPUT (See Electri- be used. Figure 12 shows how to connect this indicator. cal Specifications). If the external timebase is TTL level a pullup resistor must be used for OSC INPUT. The other way is to put a 22MΩ resistor between OSC INPUT and OSC OUTPUT and capacitively couple the EXT OSC INPUT to OSC INPUT. This will bias the OSC INPUT at its threshold
a
and the drive voltage will need to be only 2VP-P. The exter-
f b
nal timebase frequency must be greater than 100kHz or the
g
chip will reset itself to enable the on-board oscillator.
e c d DP External Decimal Point Enable
- In this mode, the EX DP INPUT is enabled (lCM7216D only). A decimal point will be displayed for the digit that its output line is connected to this
FIGURE 12. SEGMENT IDENTIFICATION AND DISPLAY FONT
input (EX DP INPUT). Digit 8 should not be used since it will Overflow will be indicated on the decimal point output of override the overflow output. Leading zero blanking is effec- digit 8. A separate LED overflow indicator can be connected tive for the digits to the left of selected decimal point. as follows:
Hold Input DEVICE CATHODE ANODE
Except in the
unit counter mode
, when the HOLD input is ICM7216A Decimal Point D8 at VDD, any measurement in progress (before STORE goes low) is stopped, the main counter is reset and the chip is ICM7216B/D D8 Decimal Point
TABLE 3. DECIMAL POINT POSITIONS FREQUENCY TIME UNIT OSCILLATOR RANGE FREQUENCY PERIOD RATIO INTERVAL COUNTER FREQUENCY
0.01s/1 Cycle D2 D2 D1 D2 D1 D2 0.1s/10 Cycle D3 D3 D2 D3 D1 D3 1s/100 Cycle D4 D4 D3 D4 D1 D4 10s/1K Cycle D5 D5 D4 D5 D1 D5 13-31
digit drivers are all off, leaving the display lines floating, so the held ready to initiate a new measurement as soon as HOLD display can be shared with other devices. In this mode, the goes low. The latches which hold the main counter data are oscillator continues to run with a typical supply current of not updated, so the last complete measurement is displayed. 1.5mA with a 10MHz crystal, but no measurements are made In
unit counter
mode when HOLD input is at VDD, the and multiplexed inputs are inactive. A new measurement counter is not stopped or reset, but the display is frozen at cycle will be initiated when the HOLD input is switched to VSS. that instantaneous value. When HOLD goes low the count continues from the new value in the new counter.
Display Test
- Display will turn on with all the digits showing 8s and all decimal points on. The display will be blanked if
RESET Input
Display Off is selected at the same time. The RESET input resets the main counter, stops any mea-
1MHz Select
- The 1MHz select mode allows use of a 1MHz surement in progress, and enables the main counter latches, crystal with the same digit multiplex rate and time between resulting in an all zero output. A capacitor to ground will pre- measurement as with a 10MHz crystal. This is done by divid- vent any hang-ups on power-up. ing the oscillator frequency by 104 rather than 105. The deci-
MEASUREMENT IN PROGRESS
mal point is also shifted one digit to the right in period and time interval, since the least significant digit will be in µs This output is provided in lCM7216D. It stays low during increment rather than 0.1µs increment. measurements and goes high for intervals between mea- surements. It is provided for system interfacing and can
External Oscillator Enable
- In this mode, the signal at EXT drive a low power Schottky TTL or one ECL load if the ECL OSC INPUT is used as a timebase instead of the on-board device is powered from the same supply as lCM7216D. crystal oscillator (built around the OSC INPUT, OSC OUT- PUT inputs). This input can be used for an external stable
Decimal Point Position
temperature compensated crystal oscillator or for special measurements with any external source. The on-board crys- Table 3 shows the decimal point position for different modes tal oscillator continues to work when the external oscillator is of lCM7216 operation. Note that the digit 1 is the least signif- selected. This is necessary to avoid hang-up problems, and icant digit. Table 3 is for 10MHz timebase frequency. has no effect on the chip's functional operation. If the on-
Overflow Indication
board oscillator frequency is less than 1MHz or only the external oscillator is used, THE OSC INPUT MUST BE When overflow happens in any measurement it will be indicated CONNECTED TO THE EXT OSC INPUT providing the time- on the decimal point of the digit 8. A separate LED indicator can base has enough voltage swing for OSC INPUT (See Electri- be used. Figure 12 shows how to connect this indicator. cal Specifications). If the external timebase is TTL level a pullup resistor must be used for OSC INPUT. The other way is to put a 22MΩ resistor between OSC INPUT and OSC OUTPUT and capacitively couple the EXT OSC INPUT to OSC INPUT. This will bias the OSC INPUT at its threshold
a
and the drive voltage will need to be only 2VP-P. The exter-
f b
nal timebase frequency must be greater than 100kHz or the
g
chip will reset itself to enable the on-board oscillator.
e c d DP External Decimal Point Enable
- In this mode, the EX DP INPUT is enabled (lCM7216D only). A decimal point will be displayed for the digit that its output line is connected to this
FIGURE 12. SEGMENT IDENTIFICATION AND DISPLAY FONT
input (EX DP INPUT). Digit 8 should not be used since it will Overflow will be indicated on the decimal point output of override the overflow output. Leading zero blanking is effec- digit 8. A separate LED overflow indicator can be connected tive for the digits to the left of selected decimal point. as follows:
Hold Input DEVICE CATHODE ANODE
Except in the
unit counter mode
, when the HOLD input is ICM7216A Decimal Point D8 at VDD, any measurement in progress (before STORE goes low) is stopped, the main counter is reset and the chip is ICM7216B/D D8 Decimal Point
TABLE 3. DECIMAL POINT POSITIONS FREQUENCY TIME UNIT OSCILLATOR RANGE FREQUENCY PERIOD RATIO INTERVAL COUNTER FREQUENCY
0.01s/1 Cycle D2 D2 D1 D2 D1 D2 0.1s/10 Cycle D3 D3 D2 D3 D1 D3 1s/100 Cycle D4 D4 D3 D4 D1 D4 10s/1K Cycle D5 D5 D4 D5 D1 D5 13-31
