Datasheet HEF4013B (Nexperia) - 9
| Manufacturer | Nexperia |
| Description | Dual D-Type Flip-Flop |
| Pages / Page | 14 / 9 — Nexperia. HEF4013B. Dual D-type flip-flop. 12. Application information. … |
| File Format / Size | PDF / 253 Kb |
| Document Language | English |
Nexperia. HEF4013B. Dual D-type flip-flop. 12. Application information. Fig. 6. N-stage shift register
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Text Version of Document
Nexperia HEF4013B Dual D-type flip-flop 12. Application information
D D Q D Q D Q Q FF FF FF 1 2 n CP Q CP Q CP Q clock 001aag089
Fig. 6. N-stage shift register
D Q D Q D Q Q FF FF FF 1 2 n clock CP Q CP Q CP Q T-type flip-flop 001aag090
Fig. 7. Binary ripple up-counter; divide-by-2n
D Q D Q D Q Q FF FF FF 1 2 n CP Q CP Q CP Q clock 001aag091
Fig. 8. Modified ring counter; divide-by-(n + 1)
HEF4013B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. Al rights reserved
Product data sheet Rev. 12 — 24 July 2024 9 / 14
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1. Waveforms and test circuit 12. Application information 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents
D D Q D Q D Q Q FF FF FF 1 2 n CP Q CP Q CP Q clock 001aag089
Fig. 6. N-stage shift register
D Q D Q D Q Q FF FF FF 1 2 n clock CP Q CP Q CP Q T-type flip-flop 001aag090
Fig. 7. Binary ripple up-counter; divide-by-2n
D Q D Q D Q Q FF FF FF 1 2 n CP Q CP Q CP Q clock 001aag091
Fig. 8. Modified ring counter; divide-by-(n + 1)
HEF4013B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. Al rights reserved
Product data sheet Rev. 12 — 24 July 2024 9 / 14
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1. Waveforms and test circuit 12. Application information 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents
