Rich Quinnell
EE Times
Combining a graphics processing unit (GPU), power management, and the 64-bit x86 processor core called "Excavator," the Embedded R-series processors announced by Advanced Micro Devices (AMD) target a range of application markets from digital signage, high-end gaming, and media storage to industrial control and communications networking. The devices also provide forward-looking support for DDR4 memory and follow the HSA (Heterogeneous System Architecture) Foundation's Platform System Architecture Specification 1.0 for efficiency in parallel processing.
The new Embedded R-Series SOCs combine AMD's next-generation x86 cores with its third-generation Graphics Core Next (GCN) architectures for a substantial boost in performance over their previous generation offering, according to Colin Cureton, AMD's senior manager for embedded products. In a presentation made to EE Times, Cureton pointed out benchmark scores showing as much as a 25% increase in CPU performance and up to a 23% increase in graphics performance over prior devices. At the same time, Cureton noted, the chips provide developers with a 30% reduction in board footprint needed because they also incorporate what previously had been an external Southbridge chip.
The advanced power management features of the R-Series SOCs allows a performance boost without an increase in power requirements, as well. "The BIOS and operating system can control the thermal envelope in which the device operates," said Cureton. Using configurable thermal design power (cTDP), developers can specify the tradeoff between power and performance, adjusting the TDP from 12 W to 35 W in 1 W increments. But even at the same power level (15 W) as prior generations the R-Series has greater graphics performance than prior generations, Cureton pointed out.
The devices contain other features beyond raw performance aimed at the needs of embedded applications, as well. There is a dedicated secure processor that performs a hardware validated boot (HVB) of the SOC to create a trusted boot environment before starting the x86 cores. Memory can support either DDR3 or the DDR4 memory types with ECC, providing forward compatibility with upcoming changes in memory technology. There are also a host of industry interfaces, including PCIe Gen. 3, USB 3.0, SATA3, SPI, and others. AMD also plans extended-temperature versions and an assured 10-year supply for R-Series SOCs to meet the environmental requirements and long product lifecycles of industrial embedded designs.
The R-Series SOCs target numerous application spaces in addition to industrial, though. For high-end gaming machines, such as those in casinos, the devices provide 4K graphics and video decoding and are capable of supporting two or three displays simultaneously. In medical imaging the devices aim to replace FPGA and DSP combinations for image transformations and can leverage their HSA architecture for software-defined beam-forming. Communications and networking is another market the R-Series aims to serve. "In communications the x86 architecture is gaining dominance in the control plane," said Cureton, "and many algorithms lend themselves to processing in the GPU."
The ability to use the GPU as an auxiliary compute engine for non-graphics applications stems in part from the HSA architecture the R-Series has adopted. "The HSA turns the GPU into another compute node rather than a slave to the CPU," Cureton said. This approach requires things like a unified memory space and memory coherency, which the R-Series provides, he added.
The processors will support several varieties of Windows as well as Linux from AMD or Mentor Graphics. The Linux drivers and stacks that AMD provides are now all 100% open source, Cureton added. Development tool support includes Mentor's Sourcery CodeBench IDE and a three-level Linux support: the free, community-sources Yocto, a free evaluation version of Mentor Embedded Linux (MEL Lite), and a MEL commercial version. AMD will also be offering reference boards and development platforms from a variety of partners, Cureton noted, targeting different application spaces.
