New multi-bit cell family, ideal for high density code and data storage, targets wide range of applications
STMicroelectronics has introduced a family of Flash memories using multi-bit cell technology based on the company's 0.15mm process. The multi-bit cell technology stores two bits of data per cell, reducing the area of the memory array by as much as 50% compared to single-bit cell technology. In addition, the new devices are ideal for both code and data storage, saving important application board space.
The combination of cell technology and ST's latest Nor-type Flash manufacturing process results in high density, high speed, and improved reliability devices. These new memories are ideal for low-cost storage applications including digital set-top boxes and still cameras, web browsers, mobile phones and PDAs, networking equipment, games and solid-state storage disks.
ST is initially offering two versions of the 128-Mbit Flash memory; the M58LW128A with a 16-bit-wide data bus and the M58LW128B that can be configured with a 16-bit or 32-bit-wide data bus. Both are organized as 128 blocks of 1-Mbit, allowing one device to store both code and data, therefore improving system performance and saving board space. Each block has its own security mechanism that can be used to protect Boot code or data.
The devices operate from a single supply voltage, making them suitable for use in handheld applications. Program, Erase and Read operations are performed using a 2.7V to 3.6V voltage supply (VDD), while the Input/Output buffer voltage supply VDDQ) is powered from 1.8V to VDD(VDDQ).
The devices can be programmed in-system on a 16 word or 8 double-word basis and can be electrically erased at block level. The Flash memory technology offers 100 000 program/erase cycles per block and 20-year data retention.
The Common Flash Interface is supported, allowing the system to easily interface with the memory so the software can upgrade itself when necessary.
The devices support both asynchronous and synchronous reads, with an asynchronous read access time of 150ns and a synchronous burst read mode operating at up to 66MHz. This makes the devices fast enough for code to be executed directly, without being copied to temporary storage.
The M58LW128A is available in a 56-lead TSOP of 14x20 mm or in a 64-ball TBGA that is 10x13mm with 1mm ball pitch. The M58LW128B is available in an 80-ball TBGA that is 10x13mm with 1mm ball pitch.
