Suited for software-defined radios, test and measurement, and wireless communications systems, the 14-bit 250-Msample/s ADS4149 A/D converter is claimed to use 30% less power (275 mW/channel), while delivering 3 dB greater SNR (72-5 dB at 100 MHz) than the nearest competitive ADC. Dynamic power scaling reduces power consumption to 215 mW at 160 Msamples/s.
Features include an optional buffered analog input that provides constant input impedance across time and frequency and eliminates sample-and-hold kickback, simplifying input matching for passive and active analog front ends, while reducing passband ripple. Also a 1 to 6-dB programmable gain option gives customers flexibility to trade off between SNR and spurious-free dynamic range (SFDR) with lowered input voltage swing. The part includes pin-compatible 12- and 14-bit options at 160 and 250 Msamples/s and buffered devices to enable customers to easily move to lower resolutions and sampling rates without altering their core design. The part is available in a 48-pin QFN package. Multichannel options will be available first half of 2010.
The TSW1200 digital capture tool facilitates rapid analysis of the ADS4149 evaluation module (EVM). An available high-speed mezzanine connector (HSMC) and FPGA mezzanine connector (FMC) allow ADS4149 EVMs to mate to FPGA EVMs for system-level prototyping to speed development time. ($89 ea/1,000 — available now.)
