Atmel Introduces Stacked Die Capability for its FPGA Conversion Product Offering

Nantes, France - January 21, 2003 - Atmel(r) Corporation (Nasdaq: ATML) announced today the first conversion of an FPGA into an Atmel ULC, with a stacked parallel EEPROM, conveniently housed in a single ChipArray(r) Thin Core Ball Grid Array (CTBGA) package.

Atmel's FPGA conversion design flow has been improved to handle stacked dice. Now, Atmel can house external memory used along with any FPGA or ASIC into a single ULC package. Using fully probed dice eases the test approach, and guarantees the best coverage at the final test stage, without compromising quality.

Elan Digital Systems, world leaders in high speed serial/PCMCIA interface ICs, were looking for board size reduction and additional integration, to fulfill the ever increasing demand for small form factor modules in nomad systems. Elan's objectives were achieved with Atmel's ULC and stacked EEPROM (AT28C16) housed in the same CTBGA64 package (8 x 8 mm). The CTBGA64 accommodated the initial FPGA TQFP100 (14 x 14 mm) and an external EEPROM TSSOP24 (8 x 14 mm), thus saving approximately 80% board area.

Atmel thoroughly investigated several packaging with multiple dice in a single package. Finally, the CTBGA proved to be the most cost-effective solution with a thickness of only 1.1 mm in total.