Datasheet MCP631, MCP632, MCP633, MCP634, MCP635, MCP639 (Microchip) - 2

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MCP631/2/3/4/5/9 Package Types MCP631 MCP631 MCP631 MCP634
SOIC 2x3 TDFN* SOT-23-5 SOIC, TSSOP NC 1 8 NC NC 1 8 NC V V 1 5 V OUTA 1 14 VOUTD OUT DD VIN– 2 7 VDD V 2 EP 7 V V IN– DD INA- 2 13 VIND- V 9 V 2 IN+ 3 6 VOUT SS V V 3 6 V INA+ 3 12 VIND+ IN+ OUT V V SS 4 5 NC V DD 4 5 NC 4 11 VSS SS VIN+ 3 4 VIN- VINB+ 5 10 VINC+ VINB- 6 9 VINC- VOUTB 7 8 VOUTC
MCP632 MCP632 MCP633 MCP633
SOIC 3x3 DFN* SOT-23-6 SOIC V 1 8 V V 1 6 V NC 1 8 OUTA DD OUTA 1 8 VDD CS VOUT DD V V V 2 7 V V 2 7 V INA– 2 7 OUTB INA– OUTB EP IN– DD 2 5 CS V 9 VSS 3 6 INA+ 3 6 VINB- VINA+ 3 6 VINB– VIN+ VOUT V 4 5 SS 4 5 VINB+ VSS 4 5 VINB+ VSS NC V 3 4 V IN+ IN-
MCP639
4x4 QFN* -
MCP635
TA TD AD D OU OU IN
MCP635
MSOP V CS V V 3x3 DFN* 16 15 14 13 VOUTA 1 10 VDD V 1 10 V OUTA VDD INA- 1 12 VIND+ VINA– 2 9 VOUTB VINA– 2 9 VOUTB VINA+ 2 11 V V EP SS INA+ 3 8 V EP INB- VINA+ 3 8 VINB- V 3 17 10 V V 11 DD INC+ SS 4 7 V V 4 7 INB+ SS VINB+ 5 V 6 4 9 V CS CSA CSB INB+ INC- A 5 6 CSB 5 6 7 8 - B TB BC TC INV OUV CS OUV * Includes Exposed Thermal Pad (EP); see Table 3-1. DS20002197C-page 2  2009-2014 Microchip Technology Inc. Document Outline 24 MHz, 2.5 mA Rail-to-Rail Output (RRO) Op Amps Features: Typical Applications: Design Aids: Description: Typical Application Circuit High Gain-Bandwidth Op Amp Portfolio Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications DC Electrial Specifications AC Electrical Specifications Digital Electrical Specifications Temperature Specifications 1.3 Timing Diagram FIGURE 1-1: Timing Diagram. 1.4 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves 2.1 DC Signal Inputs FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage with VCM = 0V. FIGURE 2-4: Input Offset Voltage vs. Output Voltage. FIGURE 2-5: Low-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-6: High-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-7: Input Offset Voltage vs. Common-Mode Voltage with VDD = 2.5V. FIGURE 2-8: Input Offset Voltage vs. Common-Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-10: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-12: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-13: Input Bias Current vs. Input Voltage (below VSS). FIGURE 2-14: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +125°C. 2.2 Other DC Voltages and Currents FIGURE 2-16: Output Voltage Headroom vs. Output Current. FIGURE 2-17: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-18: Output Short-Circuit Current vs. Power Supply Voltage. FIGURE 2-19: Supply Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Common-Mode Input Voltage. 2.3 Frequency Response FIGURE 2-21: CMRR and PSRR vs. Frequency. FIGURE 2-22: Open-Loop Gain vs. Frequency. FIGURE 2-23: Gain-Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-24: Gain-Bandwidth Product and Phase Margin vs. Common-Mode Input Voltage. FIGURE 2-25: Gain-Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-26: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-27: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-28: Channel-to-Channel Separation vs. Frequency. 2.4 Noise and Distortion FIGURE 2-29: Input Noise Voltage Density vs. Frequency. FIGURE 2-30: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 100 Hz. FIGURE 2-31: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 1 MHz. FIGURE 2-32: Input Noise vs. Time with 0.1 Hz Filter. FIGURE 2-33: THD+N vs. Frequency. 2.5 Time Response FIGURE 2-34: Non-Inverting Small Signal Step Response. FIGURE 2-35: Non-Inverting Large Signal Step Response. FIGURE 2-36: Inverting Small Signal Step Response. FIGURE 2-37: Inverting Large Signal Step Response. FIGURE 2-38: The MCP631/2/3/4/5/9 Family Shows No Input Phase Reversal With Overdrive. FIGURE 2-39: Slew Rate vs. Ambient Temperature. FIGURE 2-40: Maximum Output Voltage Swing vs. Frequency. 2.6 Chip Select Response FIGURE 2-41: CS Current vs. Power Supply Voltage. FIGURE 2-42: CS and Output Voltages vs. Time with VDD = 2.5V. FIGURE 2-43: CS and Output Voltages vs. Time with VDD = 5.5V. FIGURE 2-44: CS Hysteresis vs. Ambient Temperature. FIGURE 2-45: CS Turn-On Time vs. Ambient Temperature. FIGURE 2-46: CS Pull-Down Resistor (RPD) vs. Ambient Temperature. FIGURE 2-47: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-48: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Chip Select Digital Input (CS) 3.5 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity-Gain Voltage Limitations for Linear Operation. 4.2 Rail-to-Rail Output FIGURE 4-4: Output Current. FIGURE 4-5: Diagram for Power Calculations. 4.3 Improving Stability FIGURE 4-6: Output Resistor, RISO, Stabilizes Large Capacitive Loads. FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Amplifier with Parasitic Capacitance. FIGURE 4-9: Maximum Recommended RF vs. Gain. 4.4 MCP633, MCP635 and MCP639 Chip Select 4.5 Power Supply 4.6 High-Speed PCB Layout 4.7 Typical Applications FIGURE 4-10: Power Driver. FIGURE 4-11: Transimpedance Amplifier for an Optical Detector. FIGURE 4-12: H-Bridge Driver. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service